DSP56800ERM FREESCALE [Freescale Semiconductor, Inc], DSP56800ERM Datasheet - Page 72

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DSP56800ERM

Manufacturer Part Number
DSP56800ERM
Description
16-bit Digital Signal Controllers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
6.3.8.3
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
Note: Take care when programming the following CFG_* signals so as not to connect two
6.3.8.4
This bit selects the alternate function for GPIOB7.
6.3.8.5
This bit selects the alternate function for GPIOB6.
Note: The CLKMODE bit in the OCCS Oscillator Control register can enable this pin as the
6.3.8.6
This bit selects the alternate function for GPIOB5.
6.3.8.7
This bit selects the alternate function for GPIOB4.
6.3.8.8
This bit selects the alternate function for GPIOB3.
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different I/O pads to the same peripheral input. For example, do not set CFG_B7 to select
SCL and also set CFG_B0 to select SCL. If this occurs for an output signal, then the signal
will be routed to two I/O pads. For input signals, the values on the two I/O pads will be
ORed together before reaching the peripheral.
source clock to the chip. In this mode, make sure that no on-chip peripheral (including the
GPIO) is driving this pin.
0 = TXD (default)
1 = SCL
0 = RXD (default)
1 = SDA
0 = T1 (default)
1 = FAULT3
0 = T0 (default)
1 = CLKO
0 = MOSI (default)
1 = T3
Reserved—Bits 13–12
Configure GPIOB7 (CFG_B7)—Bit 11
Configure GPIOB6 (CFG_B6)—Bit 10
Configure GPIOB5 (CFG_B5)—Bit 9
Configure GPIOB4 (CFG_B4)—Bit 8
Configure GPIOB3 (CFG_B3)—Bit 7
56F8013 Technical Data, Rev. 2
Freescale Semiconductor
Preliminary

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