ADSP-BF523C AD [Analog Devices], ADSP-BF523C Datasheet - Page 11

• Manufacturer Part Number: ADSP-BF523C
• Description: Blackfin Embedded Processor 289-ball MBGA package
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
be used for either over-dubbing, or if the DAC is muted, as a
pure analog bypass or sidetone feature that avoids any digital
signal processing.
The line output is muted by either muting the DAC (analog) or
soft muting (digital) and disabling the bypass and sidetone
paths. See
ever the DAC is muted or the device placed in standby mode,
the dc voltage is maintained at the line outputs to prevent audi-
ble clicks.
The software control for the line outputs is shown in
Table 6. Output Software Control
The recommended external components are shown in
with C1 = 10 μF, R1 = 47 kΩ, R2 = 100 Ω.
C1 forms a dc blocking capacitor to the line outputs. R1 pre-
vents the output voltage from drifting to protect equipment
connected to the line output. R2 forms a de-coupling resistor
preventing abnormal loads from disturbing the device. Poor
choice of dielectric material for C1 can have dramatic effects on
the measured signal distortion at the output.
Headphone Amplifier
The CODEC has a stereo headphone output available on
LHPOUT and RHPOUT. The output is designed for driving
16 Ω or 32 Ω headphones with maximum efficiency and low
power consumption. The headphone output includes a high
quality volume level adjustment and mute function.
Register
Address
0000100
LINEOUT
DAC Filters on Page 10
Bit Label
3
4
5
Figure 13. Line Outputs External Circuit
BYPASS
DACSEL
SIDETONE 0
+
C1
AGND
Default Description
1
0
R1
for more information. When-
R2
Bypass Switch
1 = Enable Bypass
0 = Disable Bypass
DAC Select
1 = Select DAC
0 = Do Not Select DAC
Side Tone Switch
1 = Enable Side Tone
0 = Disable Side Tone
AGND
Rev. PrC | Page 11 of 44 | June 2008
Table
Figure 13
6.
ADSP-BF523C/ADSP-BF525C/ADSP-BF527C
The internal circuit is shown in
LHPOUT and RHPOUT volumes can be independently
adjusted under software control using the LHPVOL[6:0] and
RHPVOL[6:0] bits of the headphone output control registers.
The adjustment is logarithmic with an 80 dB range in 1 dB steps
from +6 dB to –73 dB.
The headphone outputs can be separately muted by writing
codes less than 0110000 to the LHPVOL[6:0] or RHPVO[6:0]
bits. Whenever the headphone outputs are muted or the device
placed in standby mode, the dc voltage is maintained at the line
outputs to prevent audible clicks.
A zero-cross-detect circuit is provided at the input to the head-
phones under the control of the LZCEN and RZCEN bits of the
headphone output control register. Using these controls, the
volume control values are only updated when the input signal to
the gain stage is close to the analog ground level. This minimizes
audible clicks and zipper noise as the gain values are changed or
the device muted. This circuit has no time out, so if dc levels of
more than approximately 20 mV are being applied to the gain
stage input , the gain will not be updated. This zero-cross func-
tion is enabled when the LZCEN or RZCEN bit is set high
during a volume register write. If there is concern that a dc level
may have blocked a volume change (one made with LZCEN or
RZCEN set high) then a subsequent volume write of the same
value, but with the LZCEN or RZCEN bit set low will force a
volume update, regardless of the dc level.
The LHPOUT and RHPOUT volume and zero-cross settings
can be changed independently. Or the programmer can lock the
two channels together, allowing both to be updated simulta-
neously. This halves the number of serial writes needed,
provided that the gain is the same for both channels. Setting
LRHPBOTH while writing to LHPVOL and LZCEN will simul-
taneously update the right headphone controls. Similarly,
setting RLHPBOTH while writing to RHPVOL and RZCEN will
simultaneously update the left headphone controls.
FROM
DAC VIA
LINEOUT
Figure 14. Headphone Amplifier
VMID
+
-
Figure
14.
HPOUT