ADSP-BF523C AD [Analog Devices], ADSP-BF523C Datasheet - Page 22

• Manufacturer Part Number: ADSP-BF523C
• Description: Blackfin Embedded Processor 289-ball MBGA package
• Manufacturer: AD [Analog Devices]

ADSP-BF523C/ADSP-BF525C/ADSP-BF527C
and 48 kHz respectively, then the device should be programmed
with BOSR = 0, SR3 = 0, SR2 = 0, SR1 = 0 and SR0 = 0 for a
12.288 MHz CODEC_MCLK; or with BOSR = 1, SR3 = 0, SR2 =
0, SR1 = 0 and SR0 = 0 for a 18.432 MHz CODEC_MCLK. The
ADC and DAC will operate with a digital filter of type 1. See
Digital Filter Characteristics on Page 39
the different filter types.
Table 17. Normal Mode Sample Rate Look-up
1
Examples
Sample Rate (kHz) CODEC_MCLK
ADC
48
48
8
8
32
96
44.1
44.1
8.018
8.018
88.2
Other combinations of BOSR and SR[3:0] are not valid
1. With ADC data rate 8 kHz, DAC data rate 48 kHz, and
2. With ADC data rate 8 kHz, DAC data rate 44.1 kHz, and
CODEC_MCLK = 12.288 MHz—program the device with
BOSR = 0 (256 × f
The ADC output data rate will then be exactly 8 kHz
(derived from (12.288 MHz/256) x1/6) and the DAC
expects data at exactly 48 kHz (derived from 12.288
MHz/256).
CODEC_MCLK = 16.9344 MHz— program the device
with BOSR = 1 (384 × f
0. The ADC will output data at 8.018 kHz ((16.9344
MHz/384) x 2/11) instead of exactly 8.000 kHz. The DAC is
still at exactly 44.1 kHz (derived from 16.9344 MHz/384).
DAC
48
8
48
8
32
96
44.1
8.018
44.1
8.018
88.2
Frequency (MHz)
12.288
18.432
12.288
18.432
12.288
18.432
12.288
18.432
12.288
18.432
12.288
18.432
11.2896
16.9344
11.2896
16.9344
11.2896
16.9344
11.2896
16.9344
11.2896
16.9344
S
), SR3 = 0, SR2 = 0, SR1 = 1, SR0 = 0.
S
), SR3 = 1, SR2 = 0, SR1 = 1, SR0 =
Sample Rate Register Setting
BOSR
0 (256 × f
1 (384 × f
0 (256 × f
1 (384 × f
0 (256 × f
1 (384 × f
0 (256 × f
1 (384 × f
0 (256 × f
1 (384 × f
0 (128 × f
1 (192 × f
0 (256 × f
1 (384 × f
0 (256 × f
1 (384 × f
0 (256 × f
1 (384 × f
0 (256 × f
1 (384 × f
0 (128 × f
1 (192 × f
for an explanation of
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Rev. PrC | Page 22 of 44 | June 2008
SR3
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
SR2
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
SR1
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
The BOSR bit represents the base over-sampling rate. CODEC
digital signal processing is carried out at this rate. In normal
mode with BOSR = 0, the base over-sampling rate is 256 × f
With BOSR = 1, the base over-sampling rate is 384 × f
be used to determine the actual audio data rate produced by the
ADC and required by the DAC.
SR0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
A slight (sub 0.5%) pitch shift will occur in the 8 kHz audio
data and (importantly) the user must ensure that the data
across the digital interface is correctly synchronized at the
8.018 kHz rate.
Digital Filter Type
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
2
2
Preliminary Technical Data
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. This can
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.