ADSP-BF523C AD [Analog Devices], ADSP-BF523C Datasheet - Page 30

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ADSP-BF523C

Manufacturer Part Number
ADSP-BF523C
Description
Blackfin Embedded Processor 289-ball MBGA package
Manufacturer
AD [Analog Devices]
Datasheet
ADSP-BF523C/ADSP-BF525C/ADSP-BF527C
Table 29. Register Descriptions (Continued)
Register Address
Register 8
000 1000
Sampling Control
Register 9
000 1001
Active Control
Register 10
000 1111
Reset Register
Bit Label
0 USB/
1 BOSR
5:2 SR[3:0]
6 CLKIDIV2
7 CLKODIV2
0 ACTIVE
8:0 RESET
NORMAL
Default Description
0
0
0000
0
0
0
not reset Reset Register
Mode Select
1 = USB Mode (250/272 × f
0 = Normal Mode (256/384 × f
Base Over-Sampling Rate
USB Mode
0 = 250 × f
1 = 272 × f
Normal Mode
0 = 256 × f
1 = 384 × f
ADC and DAC Sample Rate Control;
See USB Mode and Normal Mode Sample Rate Sections for Operation
CODEC Clock Divider Select
1 = CODEC Clock is CODEC_MCLK Divided by Two
0 = CODEC Clock is CODEC_MCLK
CODEC_CLKOUT Divider Select
1 = CODEC_CLKOUT is CODEC Clock Divided by Two
0 = CODEC_CLKOUT is CODEC Clock
Activate Interface
1 = Active
0 = Inactive
Writing 0000 0000 to Register Resets Device
Rev. PrC | Page 30 of 44 | June 2008
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Preliminary Technical Data

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