ADSP-BF561_06 AD [Analog Devices], ADSP-BF561_06 Datasheet - Page 24

• Manufacturer Part Number: ADSP-BF561_06
• Description: Blackfin Embedded Symmetric Multiprocessor
• Manufacturer: AD [Analog Devices]

ADSP-BF561
Asynchronous Memory Read Cycle Timing
Table 17. Asynchronous Memory Read Cycle Timing
1
Parameter
Timing Requirements
t
t
t
t
Switching Characteristics
t
t
Output pins include AMS3–0, ABE3–0, ADDR25–2, AOE, ARE.
SDAT
HDAT
SARDY
HARDY
DO
HO
ADDR25–2
CLKOUT
ABE3–0
AMSx
ARDY
AOE
ARE
DATA31–0
DATA31–0 Setup Before CLKOUT
DATA31–0 Hold After CLKOUT
ARDY Setup Before CLKOUT
ARDY Hold After CLKOUT
Output Delay After CLKOUT
Output Hold After CLKOUT
2 CYCLES
SETUP
t
DO
Figure 9. Asynchronous Memory Read Cycle Timing
1
1
PROGRAMMED READ ACCESS
t
DO
Rev. A | Page 24 of 60 | May 2006
4 CYCLES
t
SARDY
BE, ADDRESS
t
HARDY
ACCESS EXTENDED
3 CYCLES
t
SARDY
Min
2.1
0.8
4.0
0.0
0.8
t
t
HO
SDAT
READ
t
HARDY
1 CYCLE
HOLD
Max
6.0
t
HDAT
t
HO
Unit
ns
ns
ns
ns
ns
ns