KSZ8842-16MBL-EVAL MICREL [Micrel Semiconductor], KSZ8842-16MBL-EVAL Datasheet - Page 64

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KSZ8842-16MBL-EVAL

Manufacturer Part Number
KSZ8842-16MBL-EVAL
Description
2-Port Ethernet Switch with Non-PCI Interface
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
Bank 3 Memory BIST INFO Register (0x04): MBIR
Bank 3 Global Reset Register (0x06): GRR
This register controls the global reset function with information programmed by the CPU.
Bank 3 Bus Configuration Register (0x08): BCFG
This register is a read-only register. The bit 0 is automatically downloaded from bit 0 Configparm word of EEPROM, if pin
EEEN is high (enabled EEPROM)
Banks 4 – 15: Reserved
Except Bank Select Register (0xE).
Micrel, Inc.
Bit
15-13
12
11
10-5
4
3
2-0
Bit
15-1
0
Bit
15-1
0
October 2007
Default Value
0x0000
-
Default Value
0x0
-
-
-
-
-
-
Default Value
0
0x0000
R/W
RO
RO
R/W
RO
RO
RO
RO
RO
RO
RO
R/W
RO
RW
Description
Reserved
TXMBF TX Memory Bist Finish
When set, it indicates the Memory Built In Self Test completion for the TX Memory.
TXMBFA TX Memory Bist Fail
When set, it indicates the Memory Built In Self Test has failed.
Reserved
RXMBF RX Memory Bist Finish
When set, it indicates the Memory Built In Self Test completion for the RX Memory.
RXMBFA RX Memory Bist Fail
When set, it indicates the Memory Built In Self Test has failed.
Reserved
Description
Reserved
Global Soft Reset
1: software reset is active.
0: software reset is inactive.
Software reset will affect PHY, MAC, QMU, DMA, and the switch core, only the BIU
(base address registers) remains unaffected by a software reset.
Description
Reserved
Bus Configuration (only for KSZ8842-16 device)
1: bus width is 16 bits.
0: bus width is 8 bits.
(this bit is only avaiable when EEPROM is enabled)
64
KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9

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