KSZ8842-16MBL-EVAL MICREL [Micrel Semiconductor], KSZ8842-16MBL-EVAL Datasheet - Page 9

• Manufacturer Part Number: KSZ8842-16MBL-EVAL
• Description: 2-Port Ethernet Switch with Non-PCI Interface
• Manufacturer: MICREL [Micrel Semiconductor]

List of Figures
Figure 1. KSZ8842M Functional Diagram ..................................................................................................................................... 1
Figure 2. Standard – KSZ8842-16 MQL 128-Pin PQFP (Top View)............................................................................................ 11
Figure 3. Option – KSZ8842-16 MVL 128-Pin LQFP (Top View) ................................................................................................ 11
Figure 4. KSZ8842-16MBL 100-Ball LFBGA (Top View)............................................................................................................. 12
Figure 5. Standard – KSZ8842-32 MQL 128-Pin PQFP (Top View)............................................................................................ 22
Figure 6. Option – KSZ8842-32 MVL 128-Pin LQFP (Top View) ................................................................................................ 22
Figure 7. Typical Straight Cable Connection ............................................................................................................................... 29
Figure 8. Typical Crossover Cable Connection ........................................................................................................................... 30
Figure 9. Auto Negotiation and Parallel Operation ...................................................................................................................... 31
Figure 10. Destination Address Lookup Flow Chart in Stage One .............................................................................................. 33
Figure 11. Destination Address Resolution Flow Chart in Stage Two ......................................................................................... 34
Figure 12. Mapping from ISA-like, EISA-like, and VLBus-like transactions to the KSZ8842M Bus ............................................. 40
Figure 13. KSZ8842M 8-Bit, 16-Bit, and 32-Bit Data Bus Connections....................................................................................... 40
Figure 14. 802.1p Priority Field Format ....................................................................................................................................... 47
Figure 15. Port 2 Far-End Loopback Path ................................................................................................................................... 50
Figure 16. Port 1 and port 2 Near-End (Remote) Loopback Path................................................................................................ 50
Figure 17. Asynchronous Cycle – ADSN = 0............................................................................................................................. 124
Figure 18. Asynchronous Cycle – Using ADSN......................................................................................................................... 125
Figure 19. Asynchronous Cycle – Using DATACSN ................................................................................................................. 126
Figure 20. Address Latching Cycle for All Modes...................................................................................................................... 127
Figure 21. Synchronous Burst Write Cycles – VLBUSN = 1...................................................................................................... 128
Figure 22. Synchronous Burst Read Cycles – VLBUSN = 1 ..................................................................................................... 129
Figure 23. Synchronous Write Cycle – VLBUSN = 0................................................................................................................. 130
Figure 24. Synchronous Read Cycle – VLBUSN = 0................................................................................................................. 131
Figure 25. EEPROM Read Cycle Timing Diagram .................................................................................................................... 132
Figure 26. Auto-Negotiation Timing........................................................................................................................................... 133
Figure 27. Reset Timing ............................................................................................................................................................ 134
Figure 28. 128-Pin PQFP Package.Figure 29. Optional 128-Pin LQFP Package .................................................................... 136
Figure 29. Optional 128-Pin LQFP Package ............................................................................................................................. 137
Figure 30. Optional 100-Ball LFBGA Package .......................................................................................................................... 138
Micrel, Inc.
October 2007
9
KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9