MC68000 MOTOROLA [Motorola, Inc], MC68000 Datasheet - Page 123

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MC68000

Manufacturer Part Number
MC68000
Description
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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For details on the DRAM refresh controller, see 3.10 Dynamic Ram Refresh Controller.
4.2 SDMA CHANNELS
Six serial (SDMA) channels are associated with the three full-duplex SCCs. Each channel
is permanently assigned to service the receive or transmit operation of one of the SCCs and
is always available, regardless of the SCC protocol chosen.
The SDMA channels allow flexibility in managing the data flow. The user can, on a buffer-
by-buffer basis, determine whether data should be transferred between the SCCs and ex-
ternal memory or between the SCCs and on-chip dual-port RAM. This choice is controlled
in each SCC buffer descriptor. The SCC to external memory path bypasses the dual-port
RAM by allowing the SDMA channel to arbitrate for the M68000 bus directly. The SCC to
dual-port RAM path saves external memory and eliminates the need to arbitrate for the bus.
Figure 4-2 shows the paths of the data flow. Data from the SCCs may be routed directly to
external RAM as shown in path 1. In path 2, data is sent over the peripheral bus to the in-
ternal dual-port RAM. The SMCs and SCP, shown in path 3, always route their data to the
dual-port RAM since they only receive and transmit a byte at a time.
MOTOROLA
3. DRAM Refresh Controller
4. Commands Issued to the Command Register
5. SCC1 Receive Channel
6. SCC1 Transmit Channel
7. SCC2 Receive Channel
8. SCC2 Transmit Channel
9. SCC3 Receive Channel
10. SCC3 Transmit Channel
11. SMC1 Receive Channel
12. SMC1 Transmit Channel
13. SMC2 Receive Channel
14. SMC2 Transmit Channel
15. SCP Receive Channel
16. SCP Transmit Channel
MC68302 USER’S MANUAL
Communications Processor (CP)
4-3

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