MC68000 MOTOROLA [Motorola, Inc], MC68000 Datasheet - Page 318

• Manufacturer Part Number: MC68000
• Manufacturer: MOTOROLA [Motorola, Inc]

Electrical Characteristics
6.19 AC ELECTRICAL SPECIFICATIONS—IDL TIMING
6-30
unless otherwise specified
NOTES:
Num.
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
1. The ratio CLKO/L1CLK must be greater than 2.5/1.
2. High impedance is measured at the 30% and 70% of V
parallel with130 pF.
3. Where P = 1/CLKO. Thus, for a 16.67-MHz CLKO rate, P = 60 ns.
L1CLK (IDL Clock) Frequency (see Note 1)
L1CLK Width Low
L1CLK Width High (see Note 3)
L1TXD, L1RQ, SDS1–SDS2 Rising/Falling
Time
L1SY1 (sync) Setup Time (to L1CLK Falling
Edge)
L1SY1 (sync) Hold Time (from L1CLK Falling
Edge)
L1SY1 (sync) Inactive Before 4th L1CLK
L1TxD Active Delay (from L1CLK Rising
Edge)
L1TxD to High Impedance (from L1CLK Ris-
ing Edge) (see Note 2)
L1RxD Setup Time (to L1CLK Falling Edge)
L1RxD Hold Time (from L1CLK Falling Edge) 50
Time Between Successive IDL syncs
L1RQ Valid before Falling Edge of L1SY1
L1GR Setup Time (to L1SY1 Falling Edge)
L1GR Hold Time (from L1SY1 Falling Edge)
SDS1–SDS2 Active Delay from L1CLK Ris-
ing Edge
SDS1–SDS2 Inactive Delay from L1CLK
Falling Edge
Characteristic
,
are referenced to the L1CLK at 50% point of V DD ) (see Figure 6-20
MC68302 USER’S MANUAL
P+10
Min
16.67 MHz
—
55
—
30
50
50
20
50
50
10
10
0
0
0
1
DD
Max
6.66
points, with the line at V
20
75
50
75
75
—
—
—
—
—
—
—
—
—
—
—
P+10
Min
45
25
40
42
42
20
42
42
10
10
—
—
0
1
20 MHz
0
0
Max
17
65
42
65
65
—
—
—
—
—
—
—
—
—
—
—
8
(All timing measurements
P+10
Min
37
20
34
34
34
20
34
34
—
—
0
1
7
7
25 MHz
0
0
DD
/2 through 10K in
Max
10
14
50
34
50
50
—
—
—
—
—
—
—
— L1CLK
— L1CLK
—
—
MOTOROLA
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
).
,