CY8C32_12 CYPRESS [Cypress Semiconductor], CY8C32_12 Datasheet - Page 37

• Manufacturer Part Number: CY8C32_12
• Manufacturer: CYPRESS [Cypress Semiconductor]

6.4.1 Drive Modes
Each GPIO and SIO pin is individually configurable into one of the eight drive modes listed in
used for each pin (DM[2:0]) and set in the PRTxDM[2:0] registers.
drive modes.
selected. Note that the actual I/O pin voltage is determined by a combination of the selected drive mode and the load at the pin. For
example, if a GPIO pin is configured for resistive pull-up mode and driven high while the pin is floating, the voltage measured at the
pin is a high logic state. If the same GPIO pin is externally tied to ground then the voltage unmeasured at the pin is a low logic state.
Table 6-6. Drive Modes
Document Number: 001-56955 Rev. *N
Note
13. Resistive pull-up and pull-down are not available with SIO in regulated output mode.
Diagram
0
1
2
3
4
5
6
7
Table 6-6
High impedence analog
High Impedance digital
Resistive pull-up
Resistive pull-down
Open drain, drives low
Open drain, drive high
Strong drive
Resistive pull-up and pull-down
shows the I/O pin’s drive state based on the port data register value or digital array signal if bypass mode is
Drive Mode
[13]
0.
4.
DR
PS
DR
PS
[13]
Open Drain ,
Drives Low
High Impedance
Analog
Pin
Pin
[13]
1.
PS
5.
DR
DR
PS
Open Drain ,
High Impedance
Drives High
Digital
Figure 6-11. Drive Mode
PRTxDM2
Vddio
0
0
0
0
1
1
1
1
Pin
Pin
Figure 6-11
2.
6.
DR
PS
DR
PS
PRTxDM1
Resistive
Strong Drive
Pull-Up
Vddio
0
0
1
1
0
0
1
1
Vddio
Pin
Pin
depicts a simplified pin view based on each of the eight
3.
7.
DR
PS
DR
PS
PRTxDM0
Resistive
Pull-Up and Pull-Down
Resistive
Pull-Down
0
1
0
1
0
1
0
1
PSoC
Vddio
Vddio
Table
Pin
Pin
Res High (5K)
Res High (5K)
PRTxDR = 1
®
Strong High
Strong High
Strong High
6-6. Three configuration bits are
High Z
High Z
High Z
3: CY8C32 Family
Data Sheet
Res Low (5K)
Res Low (5K)
PRTxDR = 0
Page 37 of 122
Strong Low
Strong Low
Strong Low
High Z
High Z
High Z