CY8C32_12 CYPRESS [Cypress Semiconductor], CY8C32_12 Datasheet - Page 45

• Manufacturer Part Number: CY8C32_12
• Manufacturer: CYPRESS [Cypress Semiconductor]

7.2.2 Datapath Module
The datapath contains an 8-bit single cycle ALU, with associated compare and condition generation logic. This datapath block is
optimized to implement embedded functions, such as timers, counters, integrators, PWMs, PRS, CRC, shifters and dead band
generators and many others.
7.2.2.1 Working Registers
The datapath contains six primary working registers, which are
accessed by CPU firmware or DMA during normal operation.
Table 7-1. Working Datapath Registers
Document Number: 001-56955 Rev. *N
A0 and A1 Accumulators
D0 and D1 Data Registers
F0 and F1 FIFOs
Programmable
Name
Input from
Routing
(To/From Programmable Routing)
Parallel Input/Output
6
Muxes
Function
Input
These are sources and sinks for
the ALU and also sources for the
compares.
These are sources for the ALU
and sources for the compares.
These are the primary interface
to the system bus. They can be a
data source for the data registers
and accumulators or they can
capture data from the accumu-
lators or ALU. Each FIFO is four
bytes deep.
PI
PO
Description
Figure 7-8. Datapath Top Level
PHUB System Bus
Data Registers
Accumulators
FIFOs
Mask
ALU
Shift
D1
D0
F1
F0
A1
A0
R/W Access to All
Registers
7.2.2.2 Dynamic Datapath Configuration RAM
Dynamic configuration is the ability to change the datapath
function and internal configuration on a cycle-by-cycle basis,
under sequencer control. This is implemented using the
8-word × 16-bit configuration RAM, which stores eight unique
16-bit wide configurations. The address input to this RAM
controls the sequence, and can be routed from any block
connected to the UDB routing matrix, most typically PLD logic,
I/O pins, or from the outputs of this or other datapath blocks.
ALU
The ALU performs eight general purpose functions. They are:








Increment
Decrement
Add
Subtract
Logical AND
Logical OR
Logical XOR
Pass, used to pass a value through the ALU to the shift register,
mask, or another UDB register
Datapath
Previous
To/From
PSoC
D0
D1
A0
A1
®
Chaining
3: CY8C32 Family
Output
Muxes
Data Sheet
To/From
Next
Datapath
6
Page 45 of 122
Output to
Programmable
Routing