CY8C32_12 CYPRESS [Cypress Semiconductor], CY8C32_12 Datasheet - Page 64

• Manufacturer Part Number: CY8C32_12
• Manufacturer: CYPRESS [Cypress Semiconductor]

11. Electrical Specifications
Specifications are valid for –40 °C  T
except where noted. The unique flexibility of the PSoC UDBs and analog blocks enable many functions to be implemented in PSoC
Creator components, see the component datasheets for full AC/DC specifications of individual functions. See the
Peripherals”
11.1 Absolute Maximum Ratings
Table 11-1. Absolute Maximum Ratings DC Specifications
Note Usage above the absolute maximum conditions listed in
maximum conditions for extended periods of time may affect device reliability. When used below maximum conditions but above
normal operating conditions the device may not operate to specification.
Document Number: 001-56955 Rev. *N
T
V
V
V
V
V
V
V
V
V
V
I
I
I
I
VEXTREF
LU
ESD
ESD
Notes
VDDIO
GPIO
SIO
USBIO
15. The V
16. Meets or exceeds JEDEC Spec EIA/JESD78 IC Latch-up Test.
STG
IND
DDA
DDD
DDIO
CCA
CCD
SSA
GPIO
SIO
BAT
Parameter
HBM
CDM
[15]
DDIO
section on page 41 for further explanation of PSoC Creator components.
supply voltage must be greater than the maximum voltage on the associated GPIO pins. Maximum voltage on GPIO pin  V
Storage temperature
Analog supply voltage relative to
V
Digital supply voltage relative to
V
I/O supply voltage relative to V
Direct analog core voltage input
Direct digital core voltage input
Analog ground voltage
DC input voltage on GPIO
DC input voltage on SIO
Voltage at boost converter input
Boost converter supply
Current per V
GPIO current
SIO current
USBIO current
ADC external reference inputs
Latch up current
Electrostatic discharge voltage,
Human body model
Electrostatic discharge voltage,
Charge device model
SSA
SSD
Description
DDIO
[16]
supply pin
A
 85 °C and T
SSD
Higher storage temperatures
reduce NVL data retention time.
Recommended storage temper-
ature is +25 °C ±25 °C. Extended
duration storage temperatures
above 85 °C degrade reliability.
Includes signals sourced by V
and routed internal to the pin
Output disabled
Output enabled
Pins P0[3], P3[2]
V
V
J
SSA
SSA
 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
tied to V
not tied to V
Table 11-1
Conditions
SSD
SSD
may cause permanent damage to the device. Exposure to
DDA
PSoC
V
V
V
V
V
SSD
SSD
SSD
SSD
SSD
–140
2200
–0.5
–0.5
–0.5
–0.5
–0.5
Min
–55
–30
–49
–56
750
500
0.5
–
–
–0.5
–0.5
–0.5
–0.5
–0.5
®
3: CY8C32 Family
Typ
25
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
DDIO
Data Sheet
 V
V
“Example
V
DDIO
Max
1.95
1.95
SSD
100
100
140
DDA
0.5
0.5
5.5
5.5
41
28
59
Page 64 of 122
6
6
6
7
6
2
–
–
–
.
+
+
Units
mA
mA
mA
mA
mA
°C
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V