AMIS30421C4211G ONSEMI [ON Semiconductor], AMIS30421C4211G Datasheet - Page 22

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AMIS30421C4211G

Manufacturer Part Number
AMIS30421C4211G
Description
Micro-Stepping Stepper Motor Bridge Controller
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet

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Sleep Mode
SPI bit <SLP>. This mode allows reduction of
current−consumption when the motor is not in operation.
The effect of sleep mode is as follows:
AMIS−30421 can be placed in Sleep Mode by means of
The drivers are put in HiZ
All analog circuits are disabled and in low−power mode
All SPI registers maintain their logic content
SPI communication is still possible (slightly current
increase during SPI communication).
Status Registers can not be cleared by reading out
NXT and DIR inputs are forbidden
Oscillator and digital clocks are silent
Motor driver can not be cleared by means of the
CLR−pin
Figure 21. BEMF sampling without (left) and with (right) zero crossing stretching
http://onsemi.com
22
current−output capability (I
charge pump to stabilize. After this time (t
commands can be issued (see also Figure 6).
Enabling the motor when the charge pump is not stable can
result in overcurrent errors (see section Over−Curr ent
Detection). Because of this it’s advised to keep the motor
disabled during the stabilization time (t
pull−up resistors (see Figure 3). Keep this in mind when
entering Sleep Mode.
V
allowed to pull the input pins above 2.1 V!
DD_SLEEP
The voltage regulator remains active but with reduced
When Sleep Mode is left a start−up time is needed for the
The IO−pins of AMIS−30421 have internal pull−down or
In Sleep Mode V
in Table 4). Keep in mind that in this case it’s not
DD
can drop to 2.1 V minimum (see
LOAD_PD
).
SLP_SET
SLP_SET
).
) NXT

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