M28W320FSU STMICROELECTRONICS [STMicroelectronics], M28W320FSU Datasheet - Page 12

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M28W320FSU

Manufacturer Part Number
M28W320FSU
Description
32Mbit (2Mb x16) and 64Mbit (4Mb x16) 3V Supply, Uniform Block, Secure Flash Memories
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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M28W320FSU, M28W640FSU
COMMAND INTERFACE
All Bus Write operations to the memory are inter-
preted by the Command Interface. Commands
consist of one or more sequential Bus Write oper-
ations. An internal Program/Erase Controller han-
dles all timings and verifies the correct execution
of the Program and Erase commands. The Pro-
gram/Erase Controller provides a Status Register
whose output may be read at any time, to monitor
the progress of the operation, or the Program/
Erase states. See
a summary of the commands and see
D.,
sheet 1 of
terface.
The Command Interface is reset to Read mode
when power is first applied, when exiting from Re-
set or whenever V
mand sequences must be followed exactly. Any
invalid combination of commands will reset the de-
vice to Read mode. Refer to
in conjunction with the text descriptions below.
Read Memory Array Command
The Read command returns the memory to its
Read mode. One Bus Write cycle is required to is-
sue the Read Memory Array command and return
the memory to Read mode. Subsequent read op-
erations will read the addressed location and out-
put the data. When a device Reset occurs, the
memory defaults to Read mode.
Read Status Register Command
The Status Register indicates when a program or
erase operation is complete and the success or
failure of the operation itself. Issue a Read Status
Register command to read the Status Register’s
contents. Subsequent Bus Read operations read
the Status Register at any address, until another
command is issued. See
Bits, for details on the definitions of the bits.
The Read Status Register command may be is-
sued at any time, even during a Program/Erase
operation. Any Read attempt during a Program/
Erase operation will automatically output the con-
tent of the Status Register.
Read Electronic Signature Command
The Read Electronic Signature command reads
the Manufacturer and Device Codes, and the Pro-
tection Register.
The Read Electronic Signature command consists
of one write cycle, a subsequent read will output
the Manufacturer Code, the Device Code and the
Protection Register. See Tables 5, and
valid address.
12/49
Table 28., Write State Machine Current/Next,
2., for a summary of the Command In-
Table 3., Command
DD
is lower than V
Table 8., Status Register
Table 4.,
Commands,
APPENDIX
LKO
Codes, for
6
. Com-
for the
Table 3. Command Codes
Read CFI Query Command
The Read Query Command is used to read data
from the Common Flash Interface (CFI) Memory
Area, allowing programming equipment or appli-
cations to automatically match their interface to
the characteristics of the device. One Bus Write
cycle is required to issue the Read Query Com-
mand. Once the command is issued subsequent
Bus Read operations read from the Common
Flash Interface Memory Area. See
B., COMMON FLASH INTERFACE
22, 23, 24, 25,
mation contained in the Common Flash Interface
memory area.
Block Erase Command
The Block Erase command can be used to erase
a block. It sets all the bits within the selected block
to ’1’. All previous data in the block is lost. If the
block is protected then the Erase operation will
abort, the data in the block will not be changed and
the Status Register will output the error.
Two Bus Write cycles are required to issue the
command.
Hex Code
The first bus cycle sets up the Erase
command.
The second latches the block address in the
internal state machine and starts the Program/
Erase Controller.
B0h
C0h
D0h
FFh
10h
20h
30h
40h
50h
56h
70h
90h
98h
01h
Block Lock confirm
Program
Erase
Double Word Program
Program
Clear Status Register
Quadruple Word Program
Read Status Register
Read Electronic Signature
Read CFI Query
Program/Erase Suspend
Protection Register Program
Program/Erase Resume
Read Memory Array
26
and
27
Command
for details on the infor-
(CFI), Tables
APPENDIX

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