X5648 INTERSIL [Intersil Corporation], X5648 Datasheet - Page 12

• Manufacturer Part Number: X5648
• Description: CPU Supervisor with 64Kbit SPI EEPROM
• Manufacturer: INTERSIL [Intersil Corporation]

Serial Output Timing
Notes: (3) This parameter is periodically sampled and not 100% tested.
Serial Output Timing
Power-Up and Power-Down Timing
Symbol
t
t
f
RO
FO
t
t
SCK
(4) t
SCK
DIS
HO
t
CS
SO
V
(3)
(3)
SI
write cycle.
WC
is the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile
LSB IN
ADDR
Clock frequency
Output disable time
Output valid from clock low
Output hold time
Output rise time
Output fall time
RESET (X5648)
RESET (X5649)
12
MSB Out
t
V
V
CC
0 Volts
t
CYC
MSB–1 Out
Parameter
V
TRIP
X5648, X5649
t
R
t
HO
t
PURST
t
WH
t
PURST
t
WL
Min.
0
0
LSB Out
V
2.7-5.5V
TRIP
t
RPD
t
F
Max.
250
250
100
100
2
t
LAG
t
DIS
March 17, 2005
Unit
MHz
ns
ns
ns
ns
ns
FN8136.0