AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 191

• Manufacturer Part Number: AM79C976
• Description: PCnet-PRO 10/100 Mbps PCI Ethernet Controller
• Manufacturer: Advanced Micro Devices

Bit
31-0
Bit
31-16
15-0
Bit
31-0
Bit
31-16
15-0
8/01/00
Name
RES
Name
RES
RCVRL
Name
RES
Name
RES
XMTRL
zeros and read as undefined.
zeros and read as undefined.
the two’s complement of the re-
ceive descriptor ring length. This
register is initialized during the
optional Am79C976 controller ini-
tialization routine based on the
value in the RLEN field of the ini-
tialization block. However, this
register can be manually altered.
The actual receive ring length is
defined by the current value in
this register. The ring length can
be defined as any value from
1 to 65535.
Read/Write accessible. These
bits are unaffected by H_RESET,
S_RESET, or STOP.
zeros and read as undefined.
zeros and read as undefined.
the two’s complement of the
transmit descriptor ring length.
This register is initialized during
the optional Am79C976 control-
ler initialization routine based on
the value in the TLEN field of the
initialization block. However, this
register can be manually altered.
The actual transmit ring length is
defined by the current value in
this register. The ring length can
be defined as any value from 1 to
65535.
Reserved locations. Written as
Reserved locations. Written as
Receive Ring Length. Contains
Reserved locations. Written as
Reserved locations. Written as
Transmit Ring Length. Contains
Description
Description
Description
Description
P R E L I M I N A R Y
Am79C976
Bit
31-0
Bit
31-16 RES
15-14 RES
13-12 RCVFW[1:0]Receive
Name
RES
Name
Read/Write accessible. These
bits are unaffected by H_RESET,
S_RESET, or STOP.
zeros and read as undefined.
zeros and read as undefined.
zeros and read as undefined.
RCVFW controls the point at
which receive DMA is requested
in relation to the number of re-
ceived bytes in the Receive
FIFO. RCVFW specifies the num-
ber of bytes which must be
present (once the frame has
been verified as a non-runt) be-
fore receive DMA is requested.
Note however that, if the network
interface is operating in half-du-
plex mode, in order for receive
DMA to be performed for a new
frame, at least 64 bytes must
have been received. This effec-
tively avoids having to react to re-
ceive frames which are runts or
suffer a collision during the slot
time (512 bit times). If the Runt
Packet Accept feature is enabled
or if the network interface is oper-
ating in full-duplex mode, receive
DMA will be requested as soon
as either the RCVFW threshold is
reached, or a complete valid re-
ceive frame is detected (regard-
less of length). When the Full
Duplex Runt Packet Accept Dis-
able (FDRPAD) bit (BCR9, bit 2)
is set and the Am79C976 control-
ler is in full-duplex mode, in order
for receive DMA to be performed
for a new frame, at least 64 bytes
must have been received. This
effectively disables the runt pack-
et accept feature in full duplex.
Description
Reserved locations. Written as
Description
Reserved locations. Written as
Reserved locations. Written as
FIFO
Watermark.
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