HD66717A03TA0 HITACHI [Hitachi Semiconductor], HD66717A03TA0 Datasheet - Page 41

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HD66717A03TA0

Manufacturer Part Number
HD66717A03TA0
Description
(Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
Reset Function
Initializing by Internal Reset Circuit
The HD66717 is internally initialized by RESET input. During reset, the system executes the instructions
as described below. Here, the busy flag (BF) therefore indicates a busy state (BF = 1), accepting no
instruction or RAM data access from the MPU. Here, reset input must be held at least 10 ms.
After releasing power-on reset, clear display instruction is operated, so wait for 1,000 clock-cycles or
more.
Make sure to reset the HD66717 immediately after power-on reset in I
1. Instruction set initialization
a. Clear display:
b. Return home
c. Start oscillator
d. Entry mode
e. Cursor control
f. Display on/off control
g. Power control
h. Display control
i. Contrast adjust
j. Scroll control
Writes 20H to DDRAM after releasing reset
Sets the address counter (AC) to 00H to select the DDRAM
I/D = 1: Increment by 1
OSC = 0: Clock frequency not divided
B/W = 0: White-black inverting cursor off
C = 0: 8th raster-row cursor off
B = 0: Blink cursor off
DC = 0: Character display off
DS = 0: Segment display off
LC = 0: Line-cursor off
AMP = 0: LCD power supply off
SLP = 0: Sleep mode off
STB = 0: Standby mode off
NL1, NL0 = 11: 4-line display (1/34 multiplexing duty ratio)
DL3–DL1 = 000: Double-height display off
CT = 0000: Weak contrast
SN2–SN0 = 000: First line displayed at the top
SL2–SL0 = 000: First raster-row displayed at the top of the first line
2
C bus mode.
HD66717
493

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