AX88170L ASIX [ASIX Electronics Corporation], AX88170L Datasheet

AX88170L

Manufacturer Part Number

AX88170L

Description

USB to Fast Ethernet/HomePNA Controller

Manufacturer

ASIX [ASIX Electronics Corporation]

Datasheet

1.AX88170L.pdf (39 pages)

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Product description

The AX88170 USB to Fast Ethernet/HomePNA Controller is a high performance and highly integrated Controller with

embedded 5K*16 bit SRAM. The AX88170 contains a USB interface to host CPU and compliant with USB Standard V1.0 and

V1.1. The interface between AX88170 and PC Host is compliant with USB Communication Class Specification 1.0. The

AX88170 could be used for both 10M/100Mbps Fast Ethernet function based on IEEE802.3 / IEEE802.3u LAN standard and

1M/10M HomePNA standard. The AX88170 supports media-independent interface (MII) or RMII (Reduce MII) interface to

simplify the design on implementing Fast Ethernet and HomePNA functions. The chip also provides an optional MII/RMII

interface with PHY mode, combine with Ethernet repeater or switch IC can build a multiple ports USB-to-USB bridge

application.

System Block Diagram

Features

ASIX ELECTRONICS CORPORATION

2F, NO.13, Industry East Rd. II, Science-based Industrial Park, Hsin-Chu City, Taiwan, R.O.C.

TEL: 886-3-579-9500

This data sheet contains new products information. ASIX ELECTRONICS reserves the rights to modify product specification without

notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.

Single chip USB to 10/100Mbps Fast Ethernet and

1/10Mbps HomePNA Network Controller

Compliant with USB specification 1.0 and 1.1

Full Speed USB Device with bus power capability

USB Communication Class Spec 1.0 Compliant

Support 4 endpoints on USB

IEEE 802.3u 100BASE-T, TX, and T4 Compatible

Embedded 5K*16 bit SRAM

Support both full-duplex or half-duplex operation on

Fast Ethernet

Provides a MII port for both Ethernet and

HomePNA PHY interface

Supports suspended mode and remote wakeup

(link_up or magic packet)

Optional PHY power down mode for power saving

Always contact ASIX for possible updates before starting a design.

USB to Fast Ethernet/HomePNA Controller

10/100 Mbps Ethernet

MAGNETIC

RJ45

PHY/TxRx

AX88170

USB to Fast Ethernet/HomePNA Controller

FAX: 886-3-579-9558

*IEEE is a registered trademark of the Institute of Electrical and

*All other trademarks and registered trademark are the property of

Electronic Engineers, Inc.

their respect ive holders.

Provides optional MII/RMII interface with PHY

mode for multiple ports USB-to-USB bridge

application.

Support 256/512 bytes serial EEPROM (used for

saving USB Descriptors)

Support automatic loading of Ethernet ID, USB

Descriptors and Adapter Configuration from

EEPROM on power-on initialization

External PHY loop-back diagnostic capability

Small form factor 64-pin LQFP package

48MHz and 25MHz Operation, pure 3.3V operation

with I/O 5V tolerance

Document No.: AX170-12 / V1.2 / Apr. 11 ’01

1/10 Mbps

Home LAN PHY

USB I/F

MAGNETIC

Frist Released Date : Sep/11/2000

RJ11

EEPROM

http://www.asix.com.tw

AX88170 L

Related parts for AX88170L

AX88170L Summary of contents

Page 1

USB to Fast Ethernet/HomePNA Controller Features Single chip USB to 10/100Mbps Fast Ethernet and 1/10Mbps HomePNA Network Controller Compliant with USB specification 1.0 and 1.1 Full Speed USB Device with bus power capability USB Communication Class Spec 1.0 Compliant Support ...

Page 2

AX88170 1.0 INTRODUCTION ...........................................................................................................................................................................4 1 :............................................................................................................................................................ 4 ENERAL ESCRIPTION 1.2 AX88170 ...................................................................................................................................................... 4 LOCK IAGRAM 1.3 AX88170 ONNECTION IAGRAM WITH 1.4 AX88170 ONNECTION IAGRAM WITH 2.0 SIGNAL ...

Page 3

AX88170 AX88170 B D ..................................................................................................................................................... 4 IG LOCK IAGRAM AX88170 ONNECTION AX88170 ONNECTION USB AB BUS INTERFACE SIGNALS ...

Page 4

AX88170 1.0 Introduction 1.1 General Description: The AX88170 USB to Fast Ethernet Controller is a high performance and highly integrated USB bus Ethernet Controller with embedded 5K*16 bit SRAM. The AX88170 contains a full speed USB interface to host CPU ...

Page 5

AX88170 1.3 AX88170 Pin Connection Diagram with MII Interface The AX88170 is housed in the 64-pin plastic light quad flat pack. See . Diagram VSS 49 VDD 50 48M_XOUT 51 48M_XIN 52 VSS 53 VDD 54 TEST0 55 TEST1 56 ...

Page 6

AX88170 1.4 AX88170 Pin Connection Diagram with RMII Interface The AX88170 is housed in the 64-pin plastic light quad flat pack. See . Diagram RMII Interface VSS 49 VDD 50 48M_XOUT 51 48M_XIN 52 VSS 53 VDD 54 TEST0 55 ...

Page 7

AX88170 2.0 Signal Description The following terms describe the AX88170 pin-out: All pin names with the “/” suffix are asserted low. The following abbreviations are used in following Tables. I Input O Output I/O Input/Output OD Open Drain 2.1 USB ...

Page 8

AX88170 SIGNAL TYPE PIN NO. TXD[3:0] O TX_CLK I MDC O MDIO I/O/PU Tab – 3 MII interface signals group (MAC mode) 2.3b MII interface signals group (PHY mode) When /S_RMII=1 and /S_MAC=1 SIGNAL TYPE PIN NO. RXD[3:0] O CRS ...

Page 9

AX88170 2.4 RMII interface signal pins (PHY mode) When /S_RMII=0 and /S_MAC=1 SIGNAL TYPE PIN NO. RXD[1:0] O 27, 26 CRS_DV O 15 TXD[1:0] I/PU 19, 18 TX_EN I/PD 22 REF_CLK I 16 Tab – 5 RMII interface signal pins ...

Page 10

AX88170 TEST0 I/PD TEST1 I/PD TEST2 I TEST3 I/PD TEST4 I/PD TEST_OUT O LDRDY O ACT/LINK O /PHY_RST O GPIO0 B/PD GPIO1 B/PD /HOMELINK I/PU VDD P 3, 10, 23, 30 37, 44, 50 VSS P 17, 25, 34 42, ...

Page 11

AX88170 3.0 EEPROM Memory Mapping EEPROM HIGH BYTE OFFSET 00H RESERVED 01H 02H LENGTH OF DEVICE DESCRIPTOR (BYTE) 03H LENGTH OF CONFIGURATION DESCRIPTOR 04H NODE ID 1 05H NODE ID 3 06H NODE ID 5 07H LANGUAGE ID HIGH BYTE ...

Page 12

AX88170 4.0 USB Commands There are three command groups for Endpoint 0 in AX88170: l The USB standard commands l USB Communication Class commands l USB vendor commands. 4.1 USB standard commands ** The Language ID is 0x0904 for English ...

Page 13

AX88170 4.2 USB Communication Class Commands ** NN: number of multicast addresses ** BBAA: Ethernet Packet Filter ** TTSS: Number of Ethernet Statics SETUP COMMAND 6 ...

Page 14

AX88170 4.3 USB Vendor Commands SETUP COMMAND ...

Page 15

AX88170 Interrupt Endpoint report link status format Byte Number Byte 0 A1 Fixed value Byte 1 00 Fixed value Byte 2 NN Bit_0 : Ethernet Link state, Bit_1 : Home PHY Link state (active high) Byte 3 00 Fixed value ...

Page 16

AX88170 5.0 USB Configuration Structure 5.1 USB Configuration. The AX88170 supports 1 Configuration only. 5.2 USB Interface Class. The AX88170 supports 2 interfaces, the interface 0 is Data Interface and interface 1 is for Communication Interface. 5.3 USB Endpoints. The ...

Page 17

AX88170 6.0 Electrical Specification and Timings 6.1 Absolute Maximum Ratings Description Operating Temperature Storage Temperature Supply Voltage Input Voltage Output Voltage Lead Temperature (soldering 10 seconds maximum) Note: Stress above those listed under Absolute M aximum Ratings may cause permanent ...

Page 18

AX88170 6.4 A.C. Timing Characteristics 6.4.1 25M_XIN 25M_XIN T r 25M_CLKO Tod Symbol Description Tcyc CYCLE TIME Thigh CLK HIGH TIME Tlow CLK LOW TIME Tr/Tf CLK SLEW RATE Tod LCLK/XTALIN TO 25M_CLKO OUT DELAY 6.4.2 48M_XIN 48M_XIN T r ...

Page 19

AX88170 CONFIDENTIAL PRELIMINARY 19 ASIX ELECTRONICS CORPORATION ...

Page 20

AX88170 6.4.4 MII Timing of MAC mode TXCLK(in) Ttv TXD<3:0>(out) TXEN(out) RXCLK(in) RXD<3:0>(in) RXDV(in) RXER(in) CRS(in) Symbol Description Ttclk Cycle time(100Mbps) Ttclk Cycle time(10Mbps) Ttch high time(100Mbps) Ttch high time(10Mbps) Trch low time(100Mbps) Trch low time(10Mbps) Ttv Clock to data ...

Page 21

AX88170 6.4.5 MII Timing of PHY mode TXCLK(out) TXD<3:0>(in) TXEN(in) RXCLK(out) RXD<3:0>(out) RXDV(out) CRS(out) Symbol Description Ttclk Cycle time(100Mbps) Ttclk Cycle time(10Mbps) Ttch high time(100Mbps) Ttch high time(10Mbps) Trch low time(100Mbps) Trch low time(10Mbps) Tts TXD, TXEN setup to TXCLK ...

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