AX88172A ASIX [ASIX Electronics Corporation], AX88172A Datasheet
AX88172A
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AX88172A Summary of contents
Page 1
... EMI can also be a Reverse-MII or Reverse Reduced-MII (Reverse-RMII) for glueless MAC-to-MAC connections to any MCU with Ethernet MAC MII or RMII interface. In addition, the EMI can be configured to Dual-PHY mode allowing AX88172A to act as an Ethernet PHY or USB 2.0 PHY for external MAC device that needs Ethernet and USB interfaces in their system applications. The optional serial interface such as I2C, SPI, and UART are provided as a control channel from the USB Host Controller to communicate with the external MCU chip ...
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... USB 2.0 to 10/100M Fast Ethernet Controller PC/Internet Port Replicator USB KVME Internet Security for Mobile Computer Switch USB Key UMPC Pocketable Computer Consumer Electronics ePiano DVD-Recorder/DVR Figure 1 : Target Applications 2 AX88772A/AX88172A Low-pin-count Card Reader UWB/802.11n/WiMAX USB Dongle TiVo Box Game Console IPTV ASIX ELECTRONICS CORPORATION ...
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... Figure 3 : USB 2.0 to Fast Ethernet and 100BASE-FX Fiber/HomePNA Combo (MAC mode) USB 2.0 to 10/100M Fast Ethernet Controller To USB 2.0 Host I/F AX88772A Ethernet PHY SPI Magnetic I2C UART RJ45 MDC MDIO MII 100BASE FX or PHY Fiber 3 ASIX ELECTRONICS CORPORATION AX88772A/AX88172A Low-pin-count EEPROM EEPROM HomePNA PHY Magnetic RJ11 ...
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... Figure 4 : Bridging Embedded MCU to USB 2.0 Host Interface (PHY mode) To USB 2.0 Host I/F AX88172A Ethernet PHY Magnetic RJ45 Figure 5 : USB 2.0 to HomePlug Adaptor (PHY mode) AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller MDC MDIO Reverse-MII or Reverse-RMII SPI (No oscillator or buffer required) I2C UART Ethernet MAC Embedded MCU ...
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... Dual-PHY mode) SPI I2C UART AX88172A Ethernet PHY Magnetic RJ45 Figure 6 : Bridging Embedded MCU to either Ethernet PHY or USB 2.0 Interface AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Embedded MCU Ethernet MAC Reverse-MII (No oscillator or buffer required) MDC MDIO USB 2.0 device To USB 2.0 Host I/F 5 ASIX ELECTRONICS CORPORATION ...
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... Table of Contents 1.0 INTRODUCTION 1 ....................................................................................................................................... 9 ENERAL ESCRIPTION 1 ................................................................................................................................................ 9 LOCK IAGRAM 1 .............................................................................................................................................. 10 INOUT IAGRAM 2.0 SIGNAL DESCRIPTION 2.1 AX88772A 64- P PIN INOUT 2.2 AX88172A 80- P PIN INOUT 2 ARDWARE ETTING OR 3.0 FUNCTION DESCRIPTION 3.1 USB C I ORE AND NTERFACE 3.2 10/100M E PHY ................................................................................................................................. 20 THERNET 3.3 MAC C ....................................................................................................................................................... 20 ORE 3 ............................................................................................................................................. 20 PERATION ODE 3 ...
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... I2C Interface Timing................................................................................................................................. 34 9.4.9 SPI Interface Timing................................................................................................................................. 35 9.4.10 10/100M Ethernet PHY Interface Timing ................................................................................................. 37 9.4.11 USB Transceiver Interface Timing ........................................................................................................... 38 10.0 PACKAGE INFORMATION 10.1 AX88772A 64- LQFP PIN PACKAGE 10.2 AX88172A 80- TQFP PIN PACKAGE 11.0 ORDERING INFORMATION 12.0 REVISION HISTORY APPENDIX A. DEFAULT WOL READY MODE USB 2.0 to 10/100M Fast Ethernet Controller ........................................................................................................... ............................................................................ 21 EGISTER ESCRIPTION ...
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... INOUT IAGRAM AX88172A P IGURE INOUT AX88172A P IGURE INOUT AX88772A 64- P ABLE PIN INOUT AX88172A 80- P ABLE PIN INOUT ................................................................................................................................. 26 ABLE OWER CONSUMPTION USB 2.0 to 10/100M Fast Ethernet Controller List of Figures ................................................................................................................................. 2 (MAC )................................................................................................... 3 MODE 100BASE- IBER OME USB 2.0 H ...
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... MAC-to-MAC connections to any MCU with Ethernet MAC MII or RMII interface. In addition, the EMI can be configured to Dual-PHY mode allowing AX88172A to act as an Ethernet PHY or USB 2.0 PHY for external MAC device that needs Ethernet and USB interfaces in their system applications. The optional serial interface such as I2C, SPI, and UART are provided as a control channel from the USB Host Controller to communicate with the external MCU chip ...
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... Figure 8 : AX88772A Pinout Diagram (MAC mode without MII) USB 2.0 to 10/100M Fast Ethernet Controller AX88772A (MAC mode without MII ASIX ELECTRONICS CORPORATION AX88772A/AX88172A Low-pin-count 32 SI_0 31 SI_1 30 SI_2 29 SI_3 28 GPIO_0 / PME 27 GPIO_1 26 GPIO_2 25 VCCK 24 EXTWAKEUP_N 23 GND ...
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... AX88172A in 80-pin TQFP package - MAC mode with MII TXD1 61 TXD0 62 TXCLK 63 TXEN 64 VCC3IO 65 VCCK 66 XTL12P 67 XTL12N 68 VCC33A_H 69 GND33A_H 70 RREF VCC33A_PLL 74 GND33A_PLL 75 GND 76 VCC18A 77 XTL25P 78 XTL25N 79 GND18A Figure 9 : AX88172A Pinout Diagram (MAC mode with MII) USB 2 ...
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... AX88172A in 80-pin TQFP package - PHY mode with Reverse-MII RXD1 61 RXD0 62 RXCLK 63 RXDV 64 VCC3IO 65 VCCK 66 XTL12P 67 XTL12N 68 VCC33A_H 69 GND33A_H 70 RREF VCC33A_PLL 74 GND33A_PLL 75 GND 76 VCC18A 77 XTL25P 78 XTL25N 79 GND18A Figure 10 : AX88172A Pinout Diagram (PHY mode with Reverse-MII) USB 2 ...
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... AX88172A in 80-pin TQFP package - PHY mode with Reverse-RMII RXD1 61 RXD0 62 REFCLK_O 63 CRSDV 64 VCC3IO 65 VCCK 66 XTL12P 67 XTL12N 68 VCC33A_H 69 GND33A_H 70 RREF VCC33A_PLL 74 GND33A_PLL 75 GND 76 VCC18A 77 XTL25P 78 XTL25N 79 GNDK18A Figure 11 : AX88172A Pinout Diagram (PHY mode with Reverse-RMII) USB 2 ...
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... For Ethernet PHY’s internal biasing. Please connect to GND through a 12.1Kohm ±1% resistor. Link status LED indicator. This pin drives low continuously when the Ethernet link is up and drives low and high in turn (blinking) when Ethernet PHY is in receiving or transmitting state. 14 ASIX ELECTRONICS CORPORATION AX88772A/AX88172A Low-pin-count ...
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... VCC33A_PLL P 58 GND33A_PLL P 59 VCC3A3 P 2 GND3A3 P 3 VCC18A AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Misc. Pins 2.3 Settings. 2.3 Settings. 2.3 Settings. On-chip Regulator Pins Power and Ground Pins Digital Core Power. 1.8V. Digital I/O Power. 3.3V. Digital Ground. Analog Power for USB transceiver. 3.3V. Analog Ground for USB transceiver. ...
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... GND18A P 2.2 AX88172A 80-pin Pinout Description Table 2 Pin Name Type Pin VBUS I5/PD/S 58 XTL12P I3 67 XTL12N O3 68 RREF AI 71 EECK B5/PD EECS B5/PD EEDIO B5/PU XTL25P I18 78 XTL25N O18 79 RXIP AB 4 RXIN AB 5 TXOP AB 7 TXON AB 8 RSET_BG AO 1 LINK_LED ...
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... RXD [3:0 driven synchronously with respect to RXCLK by PHY. Receive Data. RXD [3:0] is driven synchronously with respect to RXCLK by PHY. Carrier Sense. CRS is asserted high asynchronously by the PHY when either transmit or receive medium is non-idle. Collision. COL is driven high by PHY when the collision is detected. 17 ASIX ELECTRONICS CORPORATION AX88772A/AX88172A Low-pin-count 2.3 Settings. 2.3 Settings. 2.3 Settings. ...
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... Transmit Data. TXD [3:0] should be driven synchronously with respect to the rising edge of TXCLK by the externally connected Ethernet MAC device with MII. Carrier Sense. CRS is asserted high by AX88172A when RXDV is asserted high in Reverse-MII mode. This pin is tri-stated in isolate mode. Collision. COL is always driven low because AX88172A is operating in 100M/full-duplex mode internally in Reverse-MII mode ...
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... USB 2.0 to 10/100M Fast Ethernet Controller Transmit Enable from the externally connected Ethernet MAC device with RMII. RMII. Receive Error. RXER is always driven low by AX88172A in Reverse-RMII mode. This pin is tri-stated in isolate mode. External Media Interface Select 1. This is used as Chip Operation Mode selection pin; please refer to section 2 ...
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... Serial EEPROM Memory Map 4.1 Detailed Description 5.0 USB Configuration Structure 5.1 USB Configuration 5.2 USB Interface 5.3 USB Endpoints 6.0 USB Commands 6.1 USB Standard Commands 6.2 USB Vendor Commands 6.2.1 Detailed Register Description 6.2.2 Command Block Wrapper for Serial Interface 6.2.2.1 UART controller AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller 20 ASIX ELECTRONICS CORPORATION Low-pin-count ...
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... PHY Mode PHY Identifier Register 2 8.1.5 PHY Mode Auto Negotiation Advertisement Register (PM_ANAR) 8.1.6 PHY Mode Auto Negotiation Link Partner Ability Register (PM_ANLPAR) 8.1.7 PHY Mode Auto Negotiation Expansion Register (PM_ANER) 8.1.8 PHY Mode Control Register (PM_Control) AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller 21 ASIX ELECTRONICS CORPORATION Low-pin-count ...
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... USB 2.0 to 10/100M Fast Ethernet Controller Parameter - 0.3 to 2.16 - 0.3 to 2. 0.3 to 3 0.3 to 2.16 - 0.3 to 4.0 - 0 150 20 20 Parameter Min 1.62 1.62 2.97 2.97 2.97 2.97 2.97 Parameter LQFP 64(AX88772A) TQFP 80(AX88172A) Still air,LQFP 64(AX88772A) Still air,TQFP 80(AX88172A) 22 AX88772A/AX88172A Low-pin-count Rating Unit ℃ Typ Max Unit 1.8 1.98 V 1.8 1. ...
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... Rpu Input pull-up resistance Rpd Input pull-down resistance Iin Input leakage current Input leakage current with pull-up resistance Input leakage current pull-down resistance I Tri-state output leakage current OZ AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Conditions Min No pull-up or pull-down -10 - Conditions Min Typ 3.3V I/O 2.97 0 ...
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... Rpu Input pull-up resistance Rpd Input pull-down resistance Iin Input leakage current Input leakage current with pull-up resistance Input leakage current pull-down resistance I Tri-state output leakage current OZ AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Conditions Min Typ 3.3V I/O 2.97 0 LVTTL - 2.0 going LVTTL 0.8 going - Iol = 8mA ...
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... Iq_125℃ Quiescent current at 125 ℃. Cout Output external capacitor. ESR Allowable effective series resistance of external capacitor. AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Conditions Normal operation Standby mode enabled VCC3R3 = 3.3V △V18F = -1%, Iload = 10mA VCC3R3 = 3.3V, Iload = 50mA VCC3R3 = 3.3V, 1mA ≦ Iload ≦ 240mA VCC3R3 = 3.3V,-40℃ ...
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... USB Full speed mode Suspend (the embedded Ethernet PHY is powered down) AX88172A in USB Full speed, Rev-MII operation and internal PHY power save (BMCR[11] bit = 1) AX88172A in USB High speed, Rev-MII operation and internal PHY power save (BMCR[11] bit = 1) 1.8V 3.3V (Excluding VCC3R3) Total of 3.3V (Including VCC3R3 regulator supplies 1 ...
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... Power-up Sequence At power-up, the AX88772A/AX88172A requires the VCC3R3/VCC3IO/VCC3A3/VCC33A_H/ VCC33A_PLL power supply to rise to nominal operating voltage within Trise3 and the V18F/VCCK/VCC18A power supply to rise to nominal operating voltage within Trise2. VCC3R3/VCC3IO/VCC3A3 /VCC33A_H/ VCC33A_PLL V18F/VCCK/VCC18A Symbol Parameter T 3.3V power supply rise time rise3 T 1.8V power supply rise time ...
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... Description Trst Reset pulse width after XTL12P is running *: If the system applications require using hardware reset pin, RESET_N, to reset AX88772A/AX88172A during device initialization or normal operation after VBUS pin is asserted, the above timing spec (Min=5 RESET_N should be met. USB 2.0 to 10/100M Fast Ethernet Controller ...
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... EEDIO input hold time USB 2.0 to 10/100M Fast Ethernet Controller scs Min - - - 2560 2562 2560 7680 23039 ASIX ELECTRONICS CORPORATION AX88772A/AX88172A Low-pin-count Typ Max Unit 5120 - ns 2560 - ns 2560 - ...
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... For 10Mbps, the typical value of Ttch, Ttcl, Trch, and Trcl shall scale to 200ns. USB 2.0 to 10/100M Fast Ethernet Controller Ttcl k Ttcl k Tts Tth Min - - - 23.0 7.0 Trclk Trclk Trs Min - - - 5.0 3.5 30 ASIX ELECTRONICS CORPORATION AX88772A/AX88172A Low-pin-count Typ Max Unit Trh Typ Max Unit 40 ...
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... MDC clock high time Tcl MDC clock low time Tod MDC clock rising edge to MDIO output delay Ts MDIO data input setup time Th MDIO data input hold time AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Min ...
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... TXD [3:0], TXEN setup to rising Tth TXD [3:0], TXEN hold from rising USB 2.0 to 10/100M Fast Ethernet Controller Tcl Tcl Tclk Tclk Trs Min - - - RX 10.0 CLK RX 10.0 CLK Tclk Tclk Min TX 11.0 CLK TX 2.0 CLK 32 ASIX ELECTRONICS CORPORATION AX88772A/AX88172A Low-pin-count Trh Typ Max Unit Tth Typ Max Unit - - ...
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... RXD [1:0], CRSDV setup to rising Tref_rh RXD [1:0], CRSDV hold from rising Tref_c l Tref_c l Tref_ch Tref_ch REFCLK_I Tref_ts TXD[1:0] TXEN Symbol Description Tref_ts TXD [1:0], TXEN setup to rising Tref_th TXD [1:0], TXEN hold from rising AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Tref_clk Tref_clk Min Typ - 20.0 - 10.0 - 10.0 REFCLK_I 4.0 REFCLK_I 2.0 Tref_clk ...
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... Tsu_dat Data Setup time. Thd_dat Data Hold time. Tsu_sto Data Setup time for STOP (P) condition. Tbuf Bus free time between a STOP and START condition. Note 2: Tsys_clk =33.33ns for 30MHz operating system clock. AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Standard Fast mode mode (Typ) (Typ) ...
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... Note 3: Fsys_clk is the operating system clock frequency 30Mhz. The SPIBRR is SPI Baud Rate Register. Tclk = 1/Fclk. Note 4: Tsys_clk =1/ Fsys_clk =33.33 ns. Note 5: It will be much greater than 22us because several factors can influence this parameter, such as USB system utilization, the CBW structure, and High/Full speed ,etc. AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Min Typ - ...
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... SPI_MOSI data setup time before SPI_SCLK edge. Dhd SPI_MOSI data hold time after SPI_SCLK edge. SSsu SPI_SS setup time before SPI_SCLK edge. SShd SPI_SS hold time after SPI_SCLK edge. SSidle SPI_SS negation to next SPI_SS active time AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Min Typ - - - - 1 ...
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... Vtxov Overshoot 10/100M Ethernet PHY Receiver Spec: Symbol Description Receiver input impedance Differential squelch voltage Common mode input voltage Maximum error-free cable length AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Condition 100BASE-TX mode 100BASE-TX mode, scrambled idle signal 100BASE-TX mode Condition 10BASE-T mode ...
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... I (DM) Measured at the connection as an application circuit. Squelch detected No squelch detected Output levels (differential) Resistance Equivalent resistance used as internal chip Termination | – (DP) I (DM) Output levels 38 ASIX ELECTRONICS CORPORATION AX88772A/AX88172A Low-pin-count Min Typ Max Unit 300 - - mV -50 - 500 100 mV 200 - - mV ...
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... PLH (DP RCV) t (rcv) PHL t Receiver propagation delay (single) PLH (DP VOP, VON) t (single) PHL Note: Full-Speed Timing diagram AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Conditions Min Driver Characteristic High-Speed Mode 500 500 Full-Speed Mode C =50pF 90 ...
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... Package Information 10.1 AX88772A 64-pin LQFP package pin 1 b θ Symbol θ USB 2.0 to 10/100M Fast Ethernet Controller Millimeter Min Typ 0.05 - 1.35 1. 0.13 0.18 7.00 7.00 - 0.40 9.00 9.00 0.45 0.60 - 1.00 REF 0° 3.5° 40 ASIX ELECTRONICS CORPORATION AX88772A/AX88172A Low-pin-count Max 0.15 1.45 1.60 0.23 - 0.75 - 7° ...
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... AX88172A 80-pin TQFP package pin 1 b θ Symbol θ USB 2.0 to 10/100M Fast Ethernet Controller Millimeter Min Typ 0.05 - 0.95 1. 0.13 0.16 10.00 10.00 - 0.4 BSC 12.00 12.00 0.45 0.60 - 1.00 REF 0° 3.5° 41 ASIX ELECTRONICS CORPORATION AX88772A/AX88172A Low-pin-count Max 0.15 1.05 1.20 0.23 - 0.75 - 7° ...
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... Ordering Information Part Number AX88772A: Product Name (64 pin). AX88772ALF L: LQFP Package. F: Lead Free. AX88172A: Product Name (80 pin). AX88172ATF T: TQFP Package. F: Lead Free. AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller Description 42 ASIX ELECTRONICS CORPORATION Low-pin-count ...
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... Section 9.2. SYSTEM 2. Move the Thermal Characteristics information from Section 9.2 to Section 9.1.2 and update the Thermal Characteristics information. 3. Update the Tj junction operating temperature information in Section 9.1.2, 9.1.4, 9.1.5 and 9.1.6. 4. Update the Reset Timing information in Section 9.4.2. 1. Update some information in Section 9.1.6. 43 AX88772A/AX88172A Low-pin-count and DEVICE ASIX ELECTRONICS CORPORATION ...
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... APPENDIX A. Default WOL Ready Mode Please contact ASIX for receiving “AX88x72A Full Datasheet” which contains detailed description of Appendix A. AX88772A/AX88172A USB 2.0 to 10/100M Fast Ethernet Controller 44 ASIX ELECTRONICS CORPORATION Low-pin-count ...
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... USB 2.0 to 10/100M Fast Ethernet Controller 4F, No.8, Hsin Ann Rd., Hsinchu Science Park, Hsinchu, Taiwan, R.O.C. TEL: +886-3-5799500 FAX: +886-3-5799558 Email: support@asix.com.tw Web: http://www.asix.com.tw 45 AX88772A/AX88172A Low-pin-count ASIX ELECTRONICS CORPORATION ...