S9S12G192F0VLL Freescale Semiconductor, S9S12G192F0VLL Datasheet - Page 180

• Manufacturer Part Number: S9S12G192F0VLL
• Description: 16-bit Microcontrollers - MCU 32Bit 192 Flash 11264RAM
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G192F0VLL

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 192 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT

Port Integration Module (S12GPIMV1)
182
PAD11
PAD10
• 64/100 LQFP: The buffered analog output signal AMP0 of the DAC0 module is mapped to this pin if
• 48 LQFP: The buffered analog output signal AMP0 of the DAC0 module is mapped to this pin if the
• 48 LQFP: The unbuffered analog output signal DACU0 of the DAC0 module is mapped to this pin if the
• 48/64 LQFP: The inverting input signal ACMPM of the analog comparator is mapped to this pin when
• 48/64/100 LQFP: If routing is inactive (PRR1[PRR1AN]=0) the ADC analog input channel signal AN11
• 48/64/100 LQFP: Pin interrupts can be generated if enabled in digital input or output mode.
• Signal priority:
• 100 LQFP: The buffered analog output signal AMP1 of the DAC1 module is mapped to this pin if the
• 48/64 LQFP: The buffered analog output signal AMP1 of the DAC1 module is mapped to this pin if the
• 48/64 LQFP: The unbuffered analog output signal DACU1 of the DAC1 module is mapped to this pin
• 48/64 LQFP: The non-inverting input signal ACMPP of the analog comparator is mapped to this pin
• 48/64/100 LQFP: If routing is inactive (PRR1[PRR1AN]=0) the ADC analog input channel signal AN10
• 48/64/100 LQFP: Pin interrupts can be generated if enabled in digital input or output mode.
• Signal priority:
the DAC is operating in “buffered DAC”, “unbuffered DAC with operational amplifier” or “operational
amplifier only” mode. If this pin is used with the DAC then the digital I/O function and pull device are
disabled.
DAC is operating in “buffered DAC”, “unbuffered DAC with operational amplifier”
amplifier only” mode. If this pin is used with the DAC then the digital I/O function and pull device are
disabled.
DAC is operating in “unbuffered DAC” mode. If this pin is used with the DAC then the digital output
function and pull device are disabled.
used with the ACMP function. The ACMP function has no effect on the output state. Refer to
NOTE/2-180
and the related digital trigger input are mapped to this pin. The ADC function has no effect on the
output state. Refer to
48 LQFP: AMP0 > DACU0 > GPO
64/100 LQFP: AMP0 > GPO
DAC is operating in “buffered DAC”, “unbuffered DAC with operational amplifier” or “operational
amplifier only” mode. If this pin is used with the DAC then the digital I/O function and pull device are
disabled.
DAC is operating in “buffered DAC”, “unbuffered DAC with operational amplifier”
amplifier only” mode. If this pin is used with the DAC then the digital output function and pull device are
disabled.
if the DAC is operating in “unbuffered DAC” mode. If this pin is used with the DAC then the digital output
function and pull device are disabled.
when used with the ACMP function. The ACMP function has no effect on the output state. Refer to
NOTE/2-180
and the related digital trigger input are mapped to this pin. The ADC function has no effect on the
output state. Refer to
48/64 LQFP: AMP1 > DACU1 > GPO
100 LQFP: AMP1 > GPO
for input buffer control.
for input buffer control.
MC9S12G Family Reference Manual,
NOTE/2-180
NOTE/2-180
Table 2-16. Port
for input buffer control.
for input buffer control.
AD
Pins AD15-8
Rev.1.23
Freescale Semiconductor
1
1
or “operational
or “operational