S9S12G192F0VLL Freescale Semiconductor, S9S12G192F0VLL Datasheet - Page 318

• Manufacturer Part Number: S9S12G192F0VLL
• Description: 16-bit Microcontrollers - MCU 32Bit 192 Flash 11264RAM
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G192F0VLL

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 192 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT

S12S Debug Module (S12SDBGV2)
Read: Anytime
Write: Bit 6 only when DBG is neither secure nor armed.Bits 3,2,0 anytime the module is disarmed.
8.3.2.4
Read: Anytime
Write: Anytime the module is disarmed.
This register configures the comparators for range matching.
320
Address: 0x0023
TSOURCE
ABCM[1:0]
TRCMOD
TALIGN
Reset
Field
Field
3–2
1–0
6
0
W
R
Trace Source Control Bit — The TSOURCE bit enables a tracing session given a trigger condition. If the MCU
system is secured, this bit cannot be set and tracing is inhibited.
This bit must be set to read the trace buffer.
0 Debug session without tracing requested
1 Debug session with tracing requested
Trace Mode Bits — See
change of flow information is stored. In Loop1 Mode, change of flow information is stored but redundant entries
into trace memory are inhibited. In Detail Mode, address and data for all memory and register accesses is stored.
In Compressed Pure PC mode the program counter value for each instruction executed is stored. See
Trigger Align Bit — This bit controls whether the trigger is aligned to the beginning or end of a tracing session.
0 Trigger at end of stored data
1 Trigger before storing data
A and B Comparator Match Control — These bits determine the A and B comparator match mapping as
described in
Debug Control Register2 (DBGC2)
0
0
7
TRCMOD
00
01
10
11
Table
= Unimplemented or Reserved
0
0
6
8-10.
Figure 8-6. Debug Control Register2 (DBGC2)
Table 8-8. TRCMOD Trace Mode Bit Encoding
MC9S12G Family Reference Manual, Rev.1.23
Section 8.4.5.2, “Trace Modes
Table 8-7. DBGTCR Field Descriptions
Table 8-9. DBGC2 Field Descriptions
0
0
5
0
0
4
Compressed Pure PC
Description
Description
Description
Normal
Loop1
Detail
for detailed Trace Mode descriptions. In Normal Mode,
0
0
3
0
0
2
Freescale Semiconductor
0
1
ABCM
Table
0
0
8-8.