S9S12G192F0VLLR Freescale Semiconductor, S9S12G192F0VLLR Datasheet - Page 735

• Manufacturer Part Number: S9S12G192F0VLLR
• Description: 16-bit Microcontrollers - MCU 32Bit 192 Flash 11264RAM
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G192F0VLLR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 192 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT

1
22.3.2.1
Read: Anytime
Write: Anytime
Note: Writing to unavailable bits has no effect. Reading from unavailable bits return a zero.
22.3.2.2
Read: Anytime but will always return 0x0000 (1 state is transient)
Write: Anytime
Note: Writing to unavailable bits has no effect. Reading from unavailable bits return a zero.
Freescale Semiconductor
Module Base + 0x0000
Module Base + 0x0001
The register is available only if corresponding channel exists.
FOC[5:0]
IOS[5:0]
Reset
Reset
Field
Field
5:0
5:0
W
W RESERVED RESERVED
R
R
RESERVED RESERVED
Input Capture or Output Compare Channel Configuration
0 The corresponding implemented channel acts as an input capture.
1 The corresponding implemented channel acts as an output compare.
Note: Force Output Compare Action for Channel 5:0 — A write to this register with the corresponding data
Timer Input Capture/Output Compare Select (TIOS)
Timer Compare Force Register (CFORC)
0
0
0
7
7
bit(s) set causes the action which is programmed for output compare “x” to occur immediately. The action
taken is the same as if a successful comparison had just taken place with the TCx register except the
interrupt flag does not get set. If forced output compare on any channel occurs at the same time as the
successful output compare then forced output compare action will take precedence and interrupt flag won’t
get set.
Figure 22-4. Timer Input Capture/Output Compare Select (TIOS)
0
0
0
6
6
Figure 22-5. Timer Compare Force Register (CFORC)
MC9S12G Family Reference Manual, Rev.1.23
Table 22-3. CFORC Field Descriptions
Table 22-2. TIOS Field Descriptions
FOC5
IOS5
0
0
0
5
5
FOC4
IOS4
0
0
0
4
4
Description
Description
FOC3
IOS3
0
0
0
3
3
FOC2
IOS2
0
0
0
2
2
Timer Module (TIM16B6CV3)
FOC1
IOS1
0
0
0
1
1
FOC0
IOS0
0
0
0
0
0
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