5SGXMA4H2F35I3LN Altera Corporation, 5SGXMA4H2F35I3LN Datasheet - Page 4

• Manufacturer Part Number: 5SGXMA4H2F35I3LN
• Description: FPGA - Field Programmable Gate Array FPGA - Stratix V GX 1900 LABS 552 IOs
• Manufacturer: Altera Corporation
• Series: Stratix V GXr

Specifications of 5SGXMA4H2F35I3LN

• Rohs: yes
• Number Of Logic Blocks: 1900
• Number Of I/os: 552
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-1152
• Distributed Ram: 37 Mbit
• Minimum Operating Temperature: - 40 C

Page 4
Stratix V Family Plan
Stratix V Device Overview
Table 1
Table 1. Stratix V GT Device Features
Logic Elements (K)
Registers (K)
28.05/12.5-Gbps Transceivers
PCIe hard IP Blocks
Fractional PLLs
M20K Memory Blocks
M20K Memory (MBits)
Variable Precision Multipliers (18x18)
Variable Precision Multipliers (27x27)
DDR3 SDRAM x72 DIMM Interfaces
User I/Os, Full-Duplex LVDS, 28.05/12.5-Gbps Transceivers
KF40-F1517
Notes to
(1) Packages are flipchip ball grid array (1.0-mm pitch).
(2) Each package row offers pin migration (common board footprint) for all devices in the row.
(3) For full package details, refer to the
(4) Migration between select Stratix V GT devices and Stratix V GX devices is available. For more information, refer to
Table 5 on page 9
lists the Stratix V GT device features.
Table
(4)
1:
Package
and to
Feature
(1), (2),
AN 644: Migration Between Stratix V GX and Stratix V GT
(3)
Package information datasheet for Altera
600, 150, 36
5SGTC5
5SGTC5
2,304
4/32
425
642
512
256
28
45
1
4
devices.
December 2012 Altera Corporation
Devices.
600, 150, 36
Stratix V Family Plan
5SGTC7
5SGTC7
2,560
4/32
622
939
512
256
28
50
1
4