5SGXMA4H2F35I3LN Altera Corporation, 5SGXMA4H2F35I3LN Datasheet - Page 8

• Manufacturer Part Number: 5SGXMA4H2F35I3LN
• Description: FPGA - Field Programmable Gate Array FPGA - Stratix V GX 1900 LABS 552 IOs
• Manufacturer: Altera Corporation
• Series: Stratix V GXr

Specifications of 5SGXMA4H2F35I3LN

• Rohs: yes
• Number Of Logic Blocks: 1900
• Number Of I/os: 552
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-1152
• Distributed Ram: 37 Mbit
• Minimum Operating Temperature: - 40 C

Page 8
Stratix V Device Overview
Table 4
Table 4. Stratix V E Device Features
Logic Elements (K)
Registers (K)
Fractional PLLs
M20K Memory Blocks
M20K Memory (MBits)
Variable Precision Multipliers (18x18)
Variable Precision Multipliers (27x27)
DDR3 SDRAM x72 DIMM Interfaces
User I/Os, Full-Duplex LVDS
H40-H1517
F45-F1932
Notes to
(1) Packages are flipchip ball grid array (1.0-mm pitch).
(2) LVDS counts are full duplex channels. Each full duplex channel is one TX pair plus one RX pair.
(3) Each package row offers pin migration (common circuit board footprint) for all devices in the row.
(4) A superscript
are slightly larger than conventional FBGAs. Refer to Altera’s packaging documentation for more information.
lists the Stratix V E device features.
Table
Package
4:
H
after the number indicates that this device is only available in a hybrid package. Hybrid packages
Features
(1), (2), (3),
(4)
696, 174
840, 210
5SEE9
5SEE9
1,268
2,640
840
704
352
28
52
6
H
December 2012 Altera Corporation
Stratix V Family Plan
696, 174
840, 210
5SEEB
5SEEB
1,437
2,640
952
704
352
28
52
6
H