MCIMX508CZK8B Freescale Semiconductor, MCIMX508CZK8B Datasheet - Page 13

• Manufacturer Part Number: MCIMX508CZK8B
• Description: Processors - Application Specialized CODEX REV 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX508CZK8B

• Core: ARM Cortex A8
• Processor Series: i.MX50

Freescale Semiconductor
eSDHCv3-3
eSDHCv2-1
eSDHCv2-2
eSDHCv2-4
(eMMC 4.4)
Mnemonic
GPIO-1
GPIO-2
GPIO-3
GPIO-4
GPIO-5
GPIO-6
Block
GPT
FEC
Ultra-High-
Speed
Multi-Media
Card/
Secure Digital
card host
controller, ver. 3
Enhanced
Multi-Media
Card/
Secure Digital
Host Controller,
ver. 2
Fast Ethernet
Controller
General
Purpose I/O
Modules
General
Purpose Timer
Block Name
i.MX50 Applications Processors for Consumer Products, Rev. 4
Table 4. i.MX50 Digital and Analog Modules (continued)
Master
Connectivity
Peripherals
Master
Connectivity
Peripherals
Slave
Connectivity
Peripherals
Timer
Peripherals
Subsystem
Ultra High-Speed eSDHC, enhanced to support eMMC 4.4 standard
specification, for 832 Mbps.
IP is backward compatible to eSDHCv2 IP. See complete features listing in
eSDHCv2 entry below.
Port 3 is specifically enhanced to support eMMC 4.4 specification, for double
data rate (832 Mbps, 8-bit port).
In Enhanced Multi-Media Card/Secure Digital Host Controller the Ports 1, 2,
and 4 are compatible with the MMC System Specification version 4.3, full
support
The generic features of the eSDHCv2 module, when serving as SD/MMC
host, include the following:
The Ethernet Media Access Controller (MAC) is designed to support both
10 Mbps and 100 Mbps Ethernet/IEEE Std 802.3™ networks. An external
transceiver interface and transceiver function are required to complete the
interface to the media.
These modules are used for general purpose input/output to external ICs.
Each GPIO module supports up to 32 bits of I/O.
Each GPT is a 32-bit free-running or set and forget mode timer with a
programmable prescaler and compare and capture register. A timer counter
value can be captured using an external event, and can be configured to
trigger a capture event on either the leading or trailing edges of an input pulse.
When the timer is configured to operate in “set and forget” mode, it is capable
of providing precise interrupts at regular intervals with minimal processor
intervention. The counter has output compare logic to provide the status and
interrupt at comparison. This timer can be configured to run either on an
external clock or on an internal clock.
• Can be configured either as SD/MMC controller
• Supports eSD and eMMC standard, for SD/MMC embedded type cards
• Conforms to SD Host Controller Standard Specification version 2.0, full
• Compatible with the SD Memory Card Specification version 1.1
• Compatible with the SDIO Card Specification version 1.2
• Designed to work with SD Memory, miniSD Memory, SDIO, miniSDIO, SD
• Configurable to work in one of the following modes:
• Full/High speed mode
• Host clock frequency variable between 32 kHz to 52 MHz
• Up to 200 Mbps data transfer for SD/SDIO cards using four parallel data
• Up to 416 Mbps data transfer for MMC cards using eight parallel data lines
support
Combo, MMC and MMC RS cards
lines
—SD/SDIO 1-bit, 4-bit
—MMC 1-bit, 4-bit, 8-bit
Brief Description
Modules List
13