MCIMX508CZK8B Freescale Semiconductor, MCIMX508CZK8B Datasheet - Page 96

• Manufacturer Part Number: MCIMX508CZK8B
• Description: Processors - Application Specialized CODEX REV 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX508CZK8B

• Core: ARM Cortex A8
• Processor Series: i.MX50

Electrical Characteristics
4.9.10
The following sections describe the UART I/O configuration and timing parameters.
4.9.10.1 UART RS-232 I/O Configuration in Different Modes
Table 69
4.9.10.2 UART RS-232 Serial Mode Timing
The following sections describe the electrical information of the UART module in the RS-232 mode.
96
RXD_MUX
TXD_MUX
Port
RTS
CTS
shows the UART I/O configuration based on which mode is enabled.
UART I/O Configuration and Timing Parameters
•
•
•
•
•
Direction
Output
Output
Input
Input
All the timings for the SSI are given for a non-inverted serial clock
polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have
been inverted, all the timing remains valid by inverting the clock signal
STCK/SRCK and/or the frame sync STFS/SRFS shown in both the
tables and figures.
All timings are on Audiomux Pads when SSI is being used for data
transfer.
Tx and Rx refer to the transmit and receive sections of the SSI.
The terms WL and BL refer to word length (WL) and bit length (BL).
For internal Frame Sync operation using external clock, the FS timing is
same as that of Tx Data (for example, during AC97 mode of operation).
i.MX50 Applications Processors for Consumer Products, Rev. 4
RTS from DTE to DCE
CTS from DCE to DTE
Serial data from DCE to DTE
Serial data from DTE to DCE
Table 69. UART I/O Configuration vs. Mode
DTE Mode
Description
NOTE
Direction
Output
Output
Input
Input
CTS from DCE to DTE
RTS from DTE to DCE
Serial data from DCE to DTE
Serial data from DTE to DCE
DCE Mode
Description
Freescale Semiconductor