AD6643-250EBZ Analog Devices, AD6643-250EBZ Datasheet - Page 12

• Manufacturer Part Number: AD6643-250EBZ
• Description: Data Conversion IC Development Tools 11 Bit Dual IF Diversity 3G Receiver
• Manufacturer: Analog Devices
• Type: ADCr
• Series: AD6643r

Specifications of AD6643-250EBZ

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: AD6643-250
• Interface Type: SPI, USB
• Operating Supply Voltage: 6 V
• Description/function: 250 MSPs per channel dual IF receiver
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Current: 2 A
• Factory Pack Quantity: 1
• For Use With: HSC-ADC-EVALCZ

AD6643
Pin No.
SPI Control
Output Enable Bar
26
30
29
32
31
34
33
36
35
39
38
41
40
43
42
25
24
45
44
46
and Power-Down
47
48
Mnemonic
D4−
D5+
D5−
D6+
D6−
D7+
D7−
D8+
D8−
D9+
D9−
D10+ (MSB)
D10− (MSB)
OR+
OR−
DCO+
DCO−
SCLK
SDIO
CSB
OEB
PDWN
Type
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input/Output
Input
Input/Output
Input/Output
Rev. C | Page 12 of 40
Description
Channel A/Channel B LVDS Output Data 4—Complement.
Channel A/Channel B LVDS Output Data 5—True.
Channel A/Channel B LVDS Output Data 5—Complement.
Channel A/Channel B LVDS Output Data 6—True.
Channel A/Channel B LVDS Output Data 6—Complement.
Channel A/Channel B LVDS Output Data 7—True.
Channel A/Channel B LVDS Output Data 7—Complement.
Channel A/Channel B LVDS Output Data 8—True.
Channel A/Channel B LVDS Output Data 8—Complement.
Channel A/Channel B LVDS Output Data 9—True.
Channel A/Channel B LVDS Output Data 9—Complement.
Channel A/Channel B LVDS Output Data 10—True.
Channel A/Channel B LVDS Output Data 10—Complement.
Channel A/Channel B LVDS Overrange—True.
Channel A/Channel B LVDS Overrange—Complement.
Channel A/Channel B LVDS Data Clock Output—True.
Channel A/Channel B LVDS Data Clock Output—Complement.
SPI Serial Clock. The serial shift clock input, which is used to synchronize
serial interface reads and writes.
SPI Serial Data I/O. A dual purpose pin that typically serves as an input or
an output, depending on the instruction being sent and the relative
position in the timing frame.
Chip Select Bar (Active Low). CSB gates the read and write cycles.
Output Enable Bar Input (Active Low).
Power-Down Input (Active High). The operation of this pin depends on
the SPI mode and can be configured as power-down or standby (see
Table 14).
Data Sheet