M58BW16FB4T3F NUMONYX, M58BW16FB4T3F Datasheet - Page 26

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M58BW16FB4T3F

Manufacturer Part Number
M58BW16FB4T3F
Description
IC FLASH 16MBIT 45NS 80PQFP
Manufacturer
NUMONYX
Datasheet

Specifications of M58BW16FB4T3F

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
16M (512K x 32)
Speed
45ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Package / Case
80-MQFP, 80-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
M58BW16FB4T3FCT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M58BW16FB4T3F
Manufacturer:
Micron Technology Inc
Quantity:
10 000
3.1.7
3.1.8
Table 6.
1. X = Don’t care.
2. Data, Manufacturer code, Device code, Burst Configuration Register, Standby Status and Block Protection Configuration
26/87
Asynchronous Bus Read
Asynchronous Latch
Controlled Bus Read
Asynchronous Page Read
Asynchronous Bus Write
Asynchronous Latch
Controlled Bus Write
Output Enable, G
Output Disable, GD
Standby
Reset/Power-down
Register are read using the Asynchronous Bus Read command.
Bus operation
Standby
When Chip Enable is High, V
Standby mode, the power consumption is reduced to the standby level (I
inputs/outputs pins are placed in the high impedance state regardless of Output Enable,
Write Enable or Output Disable inputs.
The Standby mode can be disabled by setting the Standby Disable bit (M14) of the Burst
Configuration Register to ‘1’ (see
Reset/Power-down
The memory is in Reset/Power-down mode when Reset/Power-down, RP, is at V
power consumption is reduced to the standby level (I
impedance, independent of the Chip Enable, E, Output Enable, G, Output Disable, GD, or
Write Enable, W, inputs. In this mode the device is write protected and both the Status and
the Burst Configuration Registers are cleared. A recovery time is required when the RP
input goes High.
Asynchronous Bus operations
(2)
Address Latch
Read
Address Latch
Write
Step
IH
V
V
V
V
V
V
V
V
V
V
E
X
, and the Program/Erase controller is idle, the memory enters
IH
IL
IL
IL
IL
IL
IL
IL
IL
IL
(1)
Table 18: DC
V
V
V
V
V
V
V
V
V
G
X
X
IH
IH
IH
IH
IH
IL
IL
IL
IL
GD
V
V
V
V
V
V
X
X
X
X
X
IH
IH
IH
IH
IH
IL
characteristics).
V
V
V
V
V
V
V
V
V
W
X
X
IH
IH
IH
IH
IH
IH
IL
IL
IL
DD1
V
V
V
V
V
V
V
V
V
V
RP
V
) and the outputs are high
IH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IL
V
V
V
V
V
V
L
X
X
X
X
X
IH
IH
IL
IL
IL
IL
A0-Amax
Address
Address
Address
Address
Address
X
X
X
X
X
X
DD1
) and the Data
Data output
Data output
Data output
DQ0-DQ31
Data input
Data input
IL
High Z
High Z
High Z
High Z
High Z
High Z
. The

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