RC28F128K3C115 Intel, RC28F128K3C115 Datasheet - Page 4

• Manufacturer Part Number: RC28F128K3C115
• Description: IC FLASH 128MBIT 115NS 64BGA
• Manufacturer: Intel

Specifications of RC28F128K3C115

• Rohs Status: RoHS non-compliant
• Format - Memory: FLASH
• Memory Type: StrataFlash® FLASH
• Memory Size: 128M (8Mx16)
• Speed: 115ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-BGA
• Other names: 848521

28F640K3, 28F640K18, 28F128K3, 28F128K18, 28F256K3, 28F256K18
10.0
11.0
12.0
13.0
14.0
4
9.2
Read Modes
10.1
10.2
10.3
Program Modes
11.1
11.2
11.3
11.4
11.5
Erase Mode
12.1
12.2
12.3
Security Modes
13.1
13.2
13.3
Special Modes
14.1
14.2
9.1.3
9.1.4
9.1.5
Device Commands .............................................................................................. 37
Asynchronous Page-Mode Read ........................................................................ 39
Synchronous Burst-Mode Read .......................................................................... 40
Read Configuration Register ............................................................................... 40
10.3.1 Read Mode............................................................................................. 41
10.3.2 Latency Count ........................................................................................ 41
10.3.3 WAIT Polarity ......................................................................................... 43
10.3.4 Data Hold ............................................................................................... 43
10.3.5 WAIT Delay ............................................................................................ 44
10.3.6 Burst Sequence...................................................................................... 44
10.3.7 Clock Edge ............................................................................................. 44
10.3.8 Burst Length ........................................................................................... 44
Word Programming ............................................................................................. 45
Write-Buffer Programming .................................................................................. 45
Program Suspend ............................................................................................... 46
Program Resume ................................................................................................ 47
Buffered Enhanced Factory Programming (Buffered-EFP)................................. 47
11.5.1 Buffered-EFP Requirements and Considerations .................................. 47
11.5.2 Buffered-EFP Setup Phase .................................................................... 48
11.5.3 Buffered-EFP Program and Verify Phase .............................................. 48
11.5.4 Buffered-EFP Exit Phase ....................................................................... 49
Block Erase ......................................................................................................... 50
Erase Suspend.................................................................................................... 50
Erase Resume .................................................................................................... 51
Block Locking Operations ................................................................................... 52
13.1.1 Block Lock .............................................................................................. 53
13.1.2 Block Unlock .......................................................................................... 53
13.1.3 Block Lock-Down ................................................................................... 53
13.1.4 Block Lock During Erase Suspend......................................................... 53
13.1.5 WP# Lock-Down Control ........................................................................ 53
Protection Registers ............................................................................................ 54
13.2.1 Reading the Protection Registers .......................................................... 55
13.2.2 Programming the Protection Registers .................................................. 55
13.2.3 Locking the Protection Registers ........................................................... 55
Array Protection .................................................................................................. 55
Read Status Register .......................................................................................... 56
14.1.1 Clear Status Register ............................................................................. 57
Read Device Identifier ......................................................................................... 57
................................................................................................................. 50
................................................................................................................ 39
Output Disable ....................................................................................... 36
Standby .................................................................................................. 36
Reset ...................................................................................................... 36
........................................................................................................... 56
......................................................................................................... 45
......................................................................................................... 52
Datasheet