RC28F128K3C115 Intel, RC28F128K3C115 Datasheet - Page 49

• Manufacturer Part Number: RC28F128K3C115
• Description: IC FLASH 128MBIT 115NS 64BGA
• Manufacturer: Intel

Specifications of RC28F128K3C115

• Rohs Status: RoHS non-compliant
• Format - Memory: FLASH
• Memory Type: StrataFlash® FLASH
• Memory Size: 128M (8Mx16)
• Speed: 115ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-BGA
• Other names: 848521

11.5.4
.
Datasheet
Table 19. Buffered-EFP SR.7 and SR.0 Truth table
buffer data has been transferred to the flash array, SR.0=1 indicates that the WSM is still busy. The
host system may check full status for errors at any time, but it is only necessary on a block basis,
after Buffered-EFP exit.
The host programming system continues the Buffered-EFP algorithm by providing the next set of
data words to the buffer. Alternatively, it can terminate this phase by changing the block
address.The program/verify phase concludes when the interfacing programmer writes to a different
block address; data supplied must be FFFFh. Upon program/verify phase completion, the device
enters the Buffered-EFP exit phase.
Buffered-EFP Exit Phase
SR.7=1 indicates that the device has returned to normal operating conditions. A full status check
should be performed at this time to ensure the entire block programmed successfully. After
Buffered-EFP exit, any valid CUI command can be issued. The Buffered-EFP SR.7 and SR.0 Truth
table is shown in
SR.7
0
0
1
1
SR.0
0
1
0
1
Table
28F640K3, 28F640K18, 28F128K3, 28F128K18, 28F256K3, 28F256K18
Device is BUSY, Buffer is AVAILABLE.
Device is BUSY, Buffer is NOT AVAILABLE.
Device is READY, Buffer is AVAILABLE.
Invalid state.
19.
Condition
49