PCF8534AHL/1,518 NXP Semiconductors, PCF8534AHL/1,518 Datasheet - Page 24

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PCF8534AHL/1,518

Manufacturer Part Number
PCF8534AHL/1,518
Description
IC LCD DISPLAY DRVR 60SEG 80LQFP
Manufacturer
NXP Semiconductors
Datasheets

Specifications of PCF8534AHL/1,518

Package / Case
80-LQFP
Display Type
LCD
Configuration
60 Segment
Interface
I²C
Current - Supply
8µA
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Digits
30
Number Of Segments
240
Maximum Clock Frequency
400 KHz
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 85 C
Maximum Supply Current
50 mA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Digits Or Characters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-5058-2
935289852518

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCF8534AHL/1,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
UJA1076_2
Product data sheet
6.10 Temperature protection
6.9 Interrupt output
Pin INTN is an active-LOW, open-drain interrupt output. It is driven LOW when at least
one interrupt is pending. An interrupt can be cleared by writing 1 to the corresponding bit
in the Int_Status register
interrupt status bit and not the pending wake-up. The pending wake-up is cleared on
entering Normal mode and when the corresponding standby control bit (STBCC) is 0.
On devices that contain a watchdog, the Cyclic Interrupt (CI) is enabled when the
watchdog switches to Timeout mode while the SBC is in Standby mode or Normal mode
(provided WDOFF = LOW). A CI is generated if the watchdog overflows in Timeout mode.
The CI is provided to alert the microcontroller when the watchdog overflows in Timeout
mode. The CI will wake up the microcontroller from a μC standby mode. After polling the
Int_Status register, the microcontroller will be aware that the application is in cyclic wake
up mode. It can then perform some checks on CAN before returning to the μC standby
mode.
The temperature of the SBC chip is monitored in Normal and Standby modes. If the
temperature is too high, the SBC will go to Overtemp mode, where the RSTN pin is driven
LOW and limp home is activated. In addition, the voltage regulators and the CAN
transmitter are switched off (see also
temperature falls below the temperature shutdown threshold, the SBC will go to Standby
mode. The temperature shutdown threshold is between 165 °C and 200 °C.
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 27 May 2010
(Table
7). Clearing bit CWI in Standby mode only clears the
Section 6.1.6 “Overtemp
High-speed CAN core system basis chip
mode”). When the
UJA1076
© NXP B.V. 2010. All rights reserved.
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