LTC4268IDKD-1#TRPBF Linear Technology, LTC4268IDKD-1#TRPBF Datasheet - Page 5

• Manufacturer Part Number: LTC4268IDKD-1#TRPBF
• Description: IC PD HIGH POWER W/CNTRL 32-DFN
• Manufacturer: Linear Technology
• Type: Power over Ethernet Switch (PoE)r

Specifications of LTC4268IDKD-1#TRPBF

• Applications: Remote Peripherals (Industrial Controls, Cameras, Data Access)
• Internal Switch(s): Yes
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-WFDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SYMBOL
I
V
V
I
I
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltages are with respect to V
Note 3: Active High PWRGD internal clamp circuit self-regulates to 14V
with respect to V
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specifi ed maximum operating junction
temperature may impair device reliability.
Note 5: T
dissipation P
Note 6: The LTC4268-1 operates with a negative supply voltage in the
range of –1.5V to –57V. To avoid confusion, voltages in this data sheet
are referred to in terms of absolute magnitude. Terms such as “maximum
negative voltage” refer to the largest negative voltage and a “rising
negative voltage” refers to a voltage that is becoming more negative.
Note 7: In IEEE 802.3af systems, the maximum voltage at the PD jack is
defi ned to be –57V.
Note 8: The LTC4268-1 is designed to work with two polarity protection
diodes in series with the input. Parameter ranges specifi ed in the Electrical
Characteristics are with respect to LTC4268-1 pins and are designed to
meet IEEE 802.3af specifi cations when the drop from the two diodes is
included. See Applications Information.
Note 9: Signature resistance is measured via the two-point ΔV/ΔI method
as defi ned by IEEE 802.3af. The LTC4268-1 signature resistance is offset
from 25k to account for diode resistance. With two series diodes, the total
PD resistance will be between 23.75k and 26.25k and meet IEEE 802.3af
specifi cations. The minimum probe voltages measured at the LTC4268-1
pins are –1.5V and –2.5V. The maximum probe voltages are –9.1V and
–10.1V.
Note 10: The LTC4268-1 includes hysteresis in the UVLO voltages to
preclude any start-up oscillation. Per IEEE 802.3af requirements, the
LTC4268-1 will power up from a voltage source with 20Ω series resistance
on the fi rst trial.
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifi cations are at T
R
LCOMP
UVLOL
UVLOH
LCOMP
UVLO
PGDLY
T
J
= T
= 27.4k, R
J
A
is calculated from the ambient temperature T
+ (P
DIS
DIS
according to the formula:
NEG
• 49°C/W)
. V
ENDLY
PARAMETER
Feedback Pin Load Compensation
Current
Load Comp to V
UVLO Pin Threshold
UVLO Pin Bias Current
CC
has internal 20V clamp with respect to GND.
= 90k, unless otherwise specifi ed.
SENSE
PORTP
Offset Voltage
pin unless otherwise noted.
A
and power
A
= 25°C. V
CONDITIONS
V
V
V
V
RCMP
SENSE+
UVLO
UVLO
The
= 1.2V
= 1.3V
With V
= 20mV, V
l
CC
denotes the specifi cations which apply over the full operating
= 14V, SG open, V
SENSE
Note 11: Supply current does not include gate charge current to the
MOSFETs. See Application Information.
Note 12: To disable the 25k signature, tie SHDN to V
SHDN high with respect to V
Note13: I
should be left fl oating. To disable current limit, tie I
Applications Information.
Note 14: I
Pin 3. Total supply current in classifi cation mode will be I
(See Note 15).
Note 15: I
accuracy is with respect to the ideal current defi ned as I
R
The current accuracy specifi cation does not include variations in R
resistance. The total classifi cation current for a PD also includes the IC
quiescent current (I
Note 16: This parameter is assured by design and wafer level testing.
Note 17: Active high power good is referenced to V
V
Note 18: The LTC4268-1 includes a dual current limit. At turn on, before
C1 is charged, the LTC4268-1 current level is set to I
charged and with I
With I
LTC4268-1 stays in I
below the UVLO turn-off threshold or a thermal overload occurs.
Note 19: The LTC4268-1 features thermal overload protection. In the event
of an over temperature condition, the LTC4268-1 will turn off the power
MOSFET, disable the classifi cation load current, and present an invalid
power good signal. Once the LTC4268-1 cools below the over temperature
limit, the LTC4268-1 current limit switches to I
operation resumes.
Note 20: I
normal input current limit (I
Currents at or near I
may require a reduced maximum ambient operating temperature in order
to avoid tripping the thermal overload protection.
Note 21: Component value range guaranteed by design.
PORTP
CLASS
FB
+
= 0V
= 1.23V
LIM_EN
. T
– V
LIM_EN
CLASSRDY
IN_CLASS
CLASS
LIMIT_DISA
NEG
pin tied low, the LTC4268-1 switches to I
≥ 4V.
is the measured current fl owing through R
pin is pulled high internally and for normal operation
CMP
LIM_EN
does not include classifi cation current programmed at
is the time for I
IN_CLASS
LIMIT_DISA
LIMIT_HIGH
is a safeguard current limit that is activated when the
= 1.5V, V
fl oating, the LTC4268-1 switches to I
LIMIT_HIGH
). See Applications Information.
IN
l
. See Applications Information.
will cause signifi cant package heating and
or I
SENSE
CLASS
LIMIT_DISA
1.215
–0.25
–4.50
MIN
) is defeated using the I
= 0V, R
to settle to within ±3.5% of ideal.
until the input voltage drops
LIMIT_LOW
1.237
LTC4268-1
CMP
–3.4
TYP
20
1
0
LIM_EN
NEG
= 1k, R
PORTP
LIMIT_LOW
LIMIT_DISA
and is valid for
CLASS
and normal
IN_CLASS
1.265
MAX
0.25
–2.5
to V
(±0.1V) or hold
CLASS
tON
LIM_EN
. After C1 is
IN
= 1.237/
LIMIT_HIGH
. The
. See
= 90k,
. ΔI
+ I
CLASS
CLASS
UNITS
pin.
42681fb
CLASS
5
mV
μA
μA
μA
.
V