MC33486ADH Freescale Semiconductor, MC33486ADH Datasheet - Page 26

• Manufacturer Part Number: MC33486ADH
• Description: IC SWITCH DUAL H-SIDE 20-HSOP
• Manufacturer: Freescale Semiconductor

Specifications of MC33486ADH

• Applications: DC Motor Controller, H Bridge
• Number Of Outputs: 1
• Current - Output: 10A
• Voltage - Supply: 8 V ~ 28 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-HSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Load: -

ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 1.0)
DUAL HIGH-SIDE SWITCH FOR H-BRIDGE APPLICATIONS
Introduction
This thermal addendum is provided as a supplement to the MC33486
technical datasheet. The addendum provides thermal performance
information that may be critical in the design and development of
system applications. All electrical, application, and packaging
information is provided in the datasheet.
Packaging and Thermal Considerations
sources in the package independently heating with P
results in two junction temperatures, T
resistance matrix with R
reference temperature while only heat source 1 is heating with P
the reference temperature while heat source 2 is heating with P
applies to R
This methodology is not meant to and will not predict the performance of a package in an application-specific environment. Stated
values were obtained by measurement and simulation according to the standards listed below.
Standards
Table 6.
26
33486A
ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 1.0)
Notes:
The MC33486A package is a dual die package. There are two heat
For m , n = 1, R
For m = 1, n = 2, R
The stated values are solely for a thermal performance comparison of one package to another in a standardized environment.
1.
2.
3.
4.
5.
R
R
R
Resistance
R
θ
θ
θ
Thermal
JAmn
JBmn
JAmn
θJCmn
Per JEDEC JESD51-2 at natural convection, still air
condition.
2s2p thermal test board per JEDEC JESD51-7and
JESD51-5.
Per JEDEC JESD51-8, with the board temperature on the
center trace near the power outputs.
Single layer thermal test board per JEDEC JESD51-3 and
JESD51-5.
Thermal resistance between the die junction and the
exposed pad, “infinite” heat sink attached to exposed pad.
(1)(2)
(2)(3)
(1)(4)
Thermal Performance Comparison
(5)
θJ21
T
T
J1
J2
and R
θJA11
m = 1,
=
θJA12
1 = Power Chip, 2 = Logic Chip [°C/W]
n = 1
< 0.5
7.0
θJ22
19
51
is the thermal resistance from Junction 1 to the
θJAmn
R
R
θJA21
, respectively.
θJA11
is the thermal resistance from Junction 1 to
.
R
R
m = 1, n = 2
m = 2, n = 1
θJA12
θJA22
6.0
18
50
J1
0
and T
.
P
P
J2
1
2
, and a thermal
m = 2,
n = 2
1
3.0
21
10
53
and P
2
. This
2
. This
1
.
Figure 30. Thermal Land Pattern for Direct Thermal
12.2 mm x 6.9 mm Exposed Pad
Note For package dimensions, refer to the
33486A device datasheet.
16.0 mm x 11.0 mm Body
20 Terminal HSOP-EP
Attachment per JESD51-5
1.27 mm Pitch
Analog Integrated Circuit Device Data
20-TERMINAL HSOP
20-TERMINAL
33486A
98ASH70702A
DH SUFFIX
HSOP
Freescale Semiconductor
* All measurements
0.2
are in millimeters
Soldermast
openings
Thermal vias
connected to top
buried plane
1.0
0.2
1.0