LM2642MTC/NOPB

Manufacturer Part NumberLM2642MTC/NOPB
DescriptionIC CTRLR SW SYNC STPDN 28TSSOP
ManufacturerNational Semiconductor
LM2642MTC/NOPB datasheet
 


Specifications of LM2642MTC/NOPB

ApplicationsEmbedded systems, Console/Set-Top boxesCurrent - Supply1mA
Voltage - Supply4.5 V ~ 30 VOperating Temperature-40°C ~ 125°C
Mounting TypeSurface MountPackage / Case28-TSSOP
Dc To Dc Converter TypeSynchronous Step Down ControllerNumber Of Outputs2
Pin Count28Input Voltage4.5 to 30V
Output Voltage1.3 to 30VOutput Current20A
Package TypeTSSOPMountingSurface Mount
Operating Temperature ClassificationAutomotiveOperating Temperature (min)-40C
Operating Temperature (max)125CPrimary Input Voltage30V
No. Of Outputs1No. Of Pins28
Operating Temperature Range-40°C To +125°CMslMSL 3 - 168 Hours
Control ModeCurrentRohs CompliantYes
For Use WithLM2642REVD EVAL - BOARD EVALUATION LM2642Lead Free Status / RoHS StatusLead free / RoHS Compliant
Other names*LM2642MTC
*LM2642MTC/NOPB
LM2642MTC
  
1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
13
14
15
16
17
18
19
20
21
Page 3/21

Download datasheet (2Mb)Embed
PrevNext
Pin Descriptions
(Continued)
SW2 (Pin 16): Switch-node connection for Channel 2, which
is connected to the source of the top MOSFET of Channel 2.
It serves as the negative supply rail for the top-side gate
driver, HDRV2.
HDRV2 (Pin 17): Top-side gate-drive output for Channel 2.
HDRV is a floating drive output that rides on the correspond-
ing switching-node voltage.
CBOOT2 (Pin 18): Bootstrap capacitor connection. It serves
as the positive supply rail for the Channel 2 top-side gate
drive. Connect this pin to VDD2 (Pin 19) through a diode,
and connect the low side of the bootstrap capacitor to SW2
(Pin16).
VDD2 (Pin 19): The supply rail for the Channel 2 low-side
gate drive. Connected to VLIN5 (Pin 7) through a 4.7Ω
resistor and bypassed to power ground with a ceramic ca-
pacitor of at least 1µF. Tie this pin to VDD1 (Pin 24).
LDRV2 (Pin 20): Low-side gate-drive output for Channel 2.
PGND (Pin 21): The power ground connection for both
channels. Connect to the ground rail of the system.
VIN (Pin 22): The power input pin for the chip. Connect to
the positive (+) input rail of the system. This pin must be
connected to the same voltage rail as the top FET drain (or
the current sense resistor when used).
LDRV1 (Pin 23): Low-side gate-drive output for Channel 1.
VDD1 (Pin 24): The supply rail for Channel 1 low-side gate
drive. Tie this pin to VDD2 (Pin 19).
CBOOT1 (Pin 25): : Bootstrap capacitor connection. It
serves as the positive supply rail for Channel 1 top-side gate
drive. See CBOOT2 (Pin 18).
HDRV1 (Pin 26): Top-side gate-drive output for Channel 1.
See HDRV2 (Pin 17).
SW1 (Pin 27): Switch-node connection for Channel 1. See
SW2 (Pin16).
RSNS1 (Pin 28): The negative (-) Kelvin sense for the
internal current sense amplifier of Channel 1. See RSNS2
(Pin 15).
3
www.national.com