HIP6004ECBZ Intersil, HIP6004ECBZ Datasheet - Page 3

IC PWM CTRLR/VOLT OUT MON 20SOIC

HIP6004ECBZ

Manufacturer Part Number
HIP6004ECBZ
Description
IC PWM CTRLR/VOLT OUT MON 20SOIC
Manufacturer
Intersil
Datasheet

Specifications of HIP6004ECBZ

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
1MHz
Duty Cycle
100%
Voltage - Supply
5 V ~ 12 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Frequency-max
1MHz
Input Voltage
12V
Output Voltage
1.825V
Supply Voltage Range
10.8V To 13.2V
Digital Ic Case Style
SOIC
No. Of Pins
20
Operating Temperature Range
0°C To +70°C
Filter Terminals
SMD
Rohs Compliant
Yes
Control Mode
Voltage
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Absolute Maximum Ratings
Supply voltage, V
Boot voltage, V
Input, output or I/O voltage . . . . . . . . . . . . GND -0.3V to V
ESD classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Operating Conditions
Supply voltage, V
Ambient temperature range . . . . . . . . . . . . . . . . . . . . . . 0
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
Electrical Specifications
VCC SUPPLY CURRENT
Nominal supply
POWER-ON RESET
Rising VCC threshold
Falling VCC threshold
Rising V
OSCILLATOR
Free running frequency
Total variation
Ramp amplitude
REFERENCE AND DAC
DAC (VID0-VID4) input low voltage
DAC (VID0-VID4) input high voltage
DACOUT voltage accuracy
ERROR AMPLIFIER
DC gain
Gain-bandwidth product
Slew rate
GATE DRIVERS
Upper gate source
Upper gate sink
Lower gate source
Lower gate sink
PROTECTION
Overvoltage trip (VSEN/DACOUT)
OCSET current source
OVP sourcing current
Soft start current
POWER GOOD
Upper threshold (VSEN/DACOUT)
Lower threshold (VSEN/DACOUT)
Hysteresis (VSEN/DACOUT)
PGOOD voltage low
1. θ
JA
is measured with the component mounted on a high-effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
OCSET
BOOT
PARAMETER
threshold
CC
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+15V
- V
. . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
PHASE
. . . . . . . . . . . . . . . . . . . . . . . . .+15V
3
Recommended operating conditions, unless otherwise noted
SYMBOL
V
R
R
I
I
∆V
I
GBWP
OCSET
UGATE
PGOOD
LGATE
UGATE
LGATE
I
I
OVP
I
SR
CC
SS
OSC
o
C to 70
CC
UGATE and LGATE open
V
V
RT = open
6kΩ < RT to GND < 200kΩ
RT = open
COMP = 10pF
V
I
V
I
V
V
VSEN rising
VSEN falling
Upper and lower threshold
I
+0.3V
LGATE
LGATE
PGOOD
OCSET
OCSET
BOOT
CC
OCSET
SEN
o
HIP6004E
C
= 12V, V
= 5.5V, V
- V
= 0.3A
= 0.3A
= -5mA
= 4.5V
= 4.5V
= 4.5V
PHASE
TEST CONDITIONS
LGATE
DC
OVP
Thermal Information
Thermal resistance (Typical, Note 1)
Maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . 150
Maximum storage temperature range . . . . . . . . . . . -65
Maximum lead temperature (soldering 10s) . . . . . . . . . . . . . 300
= 12V, V
SOIC package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TSSOP package . . . . . . . . . . . . . . . . . . . . . . . . . . .
(lead tips only)
= 0V
= 6V
UGATE
= 6V
MIN
-1.0
185
350
300
170
106
-15
8.2
2.0
60
89
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP
1.26
200
500
450
115
200
1.9
5.5
3.5
0.3
88
15
10
5
6
2
-
-
-
-
-
-
-
-
-
MAX
10.4
+1.0
215
+15
120
230
111
0.8
6.5
10
94
-
-
-
-
-
-
-
-
-
-
-
-
-
-
o
θ
C to 150
JA
UNITS
V
MHz
V/µs
kHz
(
mA
mA
mA
mA
65
90
dB
µA
µA
%
P-P
%
%
%
%
%
o
V
V
V
V
V
V
C/W)
o
o
o
C
C
C

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