L5994 STMicroelectronics, L5994 Datasheet - Page 21

IC CTRLR PS ADJ TRPL-OUT 32-TQFP

L5994

Manufacturer Part Number
L5994
Description
IC CTRLR PS ADJ TRPL-OUT 32-TQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of L5994

Pwm Type
Current Mode
Number Of Outputs
3
Frequency - Max
345kHz
Duty Cycle
96%
Voltage - Supply
4.75 V ~ 25 V
Buck
Yes
Boost
No
Flyback
Yes
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 140°C
Package / Case
32-TQFP, 32-VQFP
Frequency-max
345kHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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The electrical schematic, illustrated in fig. 7, shows that some pull-up/down resistor are added to the compo-
nents strictly needed in a real application. Along with a quad dip-switch, they allow to set manually the logic sig-
nals that control the chip operation. These signals are in the present case:
Please note that as long as each regulator is disabled, the relevant low-side MOSFET is in ON state. Hence, if
the load is capable of sourcing current, it will be short-circuited to ground through the choke and the low-side
MOS.
Although the default switching frequency is 300kHz (switch 2 set on 1) and the passive components have been
selected for this frequency, the demo board will work satisfactorily at 200kHz as well. Actually, at 200kHz the
regulators exhibit the maximum efficiency and the maximum extension of the input voltage range downwards.
On the other hand, the output ripple is greater and the dynamic behaviour slightly worse.
The demonstration board, as it is, does not provide an interface for synchronization. Anyway, it is possible to
synchronize the oscillator (with an appropriate signal: 5V amplitude pulses, spaced out by 400ns min.), provided
the switch is set on 1, simply by feeding the signal into the middle of the divider R8-R9. In this way, synchroni-
zation can be achieved at a frequency higher than 300kHz. To synchronize the oscillator to a frequency between
200kHz and 300kHz, heavier interventions on the board are needed.
Pulse-skipping operation is enabled by default in order to maximize efficiency also in low load current range.
The transition between PWM and pulse-skipping occurs approximately below 1A, however there is a region in
which the two operation modes coexist rather than a definite boundary. That can be seen on the scope as an
irregularity of the waveforms but does not have much influence both on output ripple and efficiency.
Those who do not appreciate asynchronous operation of the pulse-skipping mode can disable it for both regu-
lators, by setting switch 3 on 1. That maintains PWM operation up to very low output currents where, however,
the regulation becomes incompatible with the switching frequency. This means that the minimum ON-time of
the high-side MOSFET is too long for the thruput energy level at the operating frequency. Thus the control sys-
tem begins skipping conduction cycles to avoid the output voltage drifting upwards.
- Switch 1: RUN1 (0= 5.1V OFF, 1= 5.1V ON)
- Switch 2: OSC (0= 200kHz, 1=300kHz)
- Switch 3: NOSKIP (0= pulse-skipping ON, 1= pulse-skipping OFF)
- Switch 4: RUN2 (0= 3.3V OFF, 1= 3.3V ON)
L5994 - L5994A
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