L5994 STMicroelectronics, L5994 Datasheet - Page 6

• Manufacturer Part Number: L5994
• Description: IC CTRLR PS ADJ TRPL-OUT 32-TQFP
• Manufacturer: STMicroelectronics

Specifications of L5994

• Pwm Type: Current Mode
• Number Of Outputs: 3
• Frequency - Max: 345kHz
• Duty Cycle: 96%
• Voltage - Supply: 4.75 V ~ 25 V
• Buck: Yes
• Boost: No
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 140°C
• Package / Case: 32-TQFP, 32-VQFP
• Frequency-max: 345kHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

L5994 - L5994A
PIN DESCRIPTION
6/26
N°
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
H1STRAP Section 1 bootstrap capacitor connection. A bootstrap capacitor must be connected between
PWROK1
NOSKIP
COMP1
COMP2
SREG5
V1SNS
SOFT1
SOFT2
V2SNS
V5SW
I1SNS
SGND
I2SNS
Name
CRST
RUN1
RUN2
OSC
Vref
Vin
this pin and pin H1SRC to supply the H1GATE driver.
Device supply voltage.
Internal logic supply. It must be connected to PREG5 pin through a R-C low-pass filter.
Alternative supply voltage for the internal 5V regulator. If its voltage is greater than 4.5V, the
internal regulator is supplied via this pin. If left floating, the regulator is supplied through the
Vin pin.
This pin connects the (-) input of section 1 current sense comparator. It must be connected
downstream the external R
This pin connects the (+) input of section 1 current sense comparator. It must be connected
upstream the external R
Feedback input for section 1. It must be connected directly or through a resistor divider to the
output of the section 1.
Soft start connection for section 1. The soft start time is programmed by an external capacitor
connected between this pin and SGND. Approximatively 0.7ms/nF.
Used for start-up and shut-down timing. A capacitor must be connected between this pin and
SGND defining a time of 1.47ms/nF.
Power Good open drain diagnostic signal. This output is in high inpedence when sect. 1 is
enabled and running properly after a delay defined by the CRST capacitor. When not used
may be left floating.
Control input to enable / disable the section 1. A high logic level (>2.4V) enables this section,
a low level (<0.8V) shuts it down.
Internal 2.5V high accuracy voltage generator. It can source 5mA to external load. Bypass to
SGND with a 4.7uF electrolytic capacitor to reduce noise.
Signal ground. Reference for internal logic circuitry. It must be routed separately from high
current returns.
Pulse skipping mode control. A high logic level (>2.4V) disables pulse skipping at low load
current, a low level (<0.8V) enables it.
Oscillator frequency control: connect to 2.5V to select 300kHz operation, connect to ground or
to 5V for 200kHz operation.
A proper external signal can synchronise the oscillator
Control input to enable / disable the section 2. A high logic level (>2.4V) enables this section,
a low level (<0.8V) shuts it down.
Soft start connection for section 2. The soft start time is programmed by an external capacitor
connected between this pin and SGND. Approximatively 0.7ms/nF.
Feedback input for section 2. It must be connected directly or through a resistor divider to the
output of the section 2.
This pin connects the (+) input of section 2 current sense comparator. It must be connected
upstream the external R
This pin connects the (-) input of section 2 current sense comparator. It must be connected
downstream the external R
SENSE
SENSE
SENSE
SENSE
resistor.
resistor.
resistor.
resistor.
Function