ISL6569ACRZ Intersil, ISL6569ACRZ Datasheet
ISL6569ACRZ
Specifications of ISL6569ACRZ
Related parts for ISL6569ACRZ
ISL6569ACRZ Summary of contents
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... ISL6569ACB ISL6569ACBZ (Note SOIC (Pb-free) ISL6569ACR ISL6569ACRZ (Note 5x5 QFN (Pb-free) L32.5x5 Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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Pinouts ISL6569ACB (24 LD SOIC) TOP VIEW GND OVP 23 3 VID4 22 VID3 VID2 5 VID1 VID0 18 OFS 8 17 COMP IOUT ...
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Block Diagram VID4 VID3 DYNAMIC VID2 VID DAC VID1 VID0 e/a FB COMP OFS x0.1 100µA VDIFF 2.2V VSEN diff RGND AVERAGE IDROOP 3 ISL6569A PGOOD VCC EN 6V POR AND SOFT START ...
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Typical Application - 2 Phase Converter +12V VSEN RGND VCC VDIFF PWM1 FB IOUT ISEN1 COMP ISL6569A OFS FS/DIS VID4 VID3 VID2 VID1 PWM2 VID0 PGOOD ISEN2 +12V EN GND 4 ISL6569A +12V 300Ω PVCC BOOT UGATE VCC PHASE DRIVER ...
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Absolute Maximum Ratings Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V ...
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Electrical Specifications Operating Conditions: VCC = 5V, T PARAMETER Disable Voltage Sawtooth Amplitude Max Duty Cycle ERROR AMPLIFIER Open-Loop Gain Open-Loop Bandwidth Slew Rate Maximum Output Voltage Source Current Sink Current REMOTE-SENSE AMPLIFIER Input Impedance Bandwidth Slew Rate SENSE CURRENT ...
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... Pull this pin below 1.14V, taking into account the enable hysteresis, to disable the controller once in operation. Connect a resistor divider to this pin to set the power-on voltage level for proper coordination with Intersil MOSFET drivers. If this function is not required, simply tie this pin to VCC. ...
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OFS x0.1 100µA COMP REFERENCE & DAC + + ERROR FB - AMPLIFIER IOUT I OUT - VDIFF VSEN RGND FIGURE 1. SIMPLIFIED BLOCK DIAGRAM OF A ISL6569A CONVERTER Interleaving The switching of each channel in a ...
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In addition, the peak-to-peak amplitude of the combined inductor currents is reduced in proportion to the number of phases. To understand the reduction of ripple current amplitude in the multi-phase circuit, examine the equation representing an individual channel’s peak-to-peak inductor ...
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... V signal is compared to a sawtooth ramp signal and produces a pulse width which corrects for any unbalance and drives the error current toward zero. Figure 6 illustrates Intersil’s patented current balance method as implemented on one channel of a multi-phase converter. Two considerations designers face are MOSFET selection and inductor design ...
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... The output of the error amplifier, V COMP sawtooth waveform to modulate the pulse width of the PWM signals. The PWM signals control the timing of the Intersil MOSFET drivers and regulate the converter output to the specified reference voltage. Three distinct inputs to the error amplifier determine the voltage level of V and external circuitry which control voltage regulation is illustrated in Figure 6 ...
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TABLE 1. VOLTAGE IDENTIFICATION CODES (Continued) VID4 VID3 VID2 VID1 LOAD-LINE REGULATION Microprocessor load current demands ...
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... It is important that the driver ICs reach their POR level before the ISL6569A becomes enabled. The schematic in Figure 8 demonstrates sequencing the ISL6569A with the HIP660X family of Intersil MOSFET drivers which require 12V bias. Third, the frequency select/disable input (FS/DIS) will shutdown the converter when pulled to ground ...
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... ISL6569A to protect the microprocessor load. First, all PWM outputs are commanded low. Directing the Intersil drivers to turn on the lower MOSFETs; shunting the output to ground preventing any further increase in output voltage. The PWM outputs remain low until VDIFF falls to the ...
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... The Intersil drivers respond by turning off both upper and lower MOSFETs. If the over-voltage condition reoccurs, the ISL6569A will again command the lower MOSFETs to turn on. The ISL6569A will continue to protect the load in this fashion as long as the over-voltage repeats. Second, the OVP pin pulls to VCC and can deliver 100mA ...
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Equation 1 the duty cycle ( the per-channel inductance – M -------------------------------- ...
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Load-Line Regulation Resistor The load-line regulation resistor is labeled R Its value depends on the desired full-load droop voltage (V in Figure 6). If Equation 19 is used to select each DROOP ISEN resistor, the load-line regulation resistor is as ...
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COMPENSATING LOAD-LINE REGULATED CONVERTER The load-line regulated converter behaves in a similar manner to a peak-current mode controller because the two poles at the output-filter L-C resonant frequency split with the introduction of current information into the control loop. The ...
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COMP IOUT VDIFF FIGURE 14. COMPENSATION CIRCUIT FOR ISL6569A BASED CONVERTER WITHOUT LOAD-LINE REGULATION In the solutions to the compensation equations, there is a single degree of ...
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... Align the output inductors and MOSFETs such that space between the components is minimized while creating the PHASE plane. Place the Intersil HIP660X drivers as close as possible to the MOSFETs they control to reduce the parasitics due to trace length between critical driver input and output signals ...
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Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - -C- α µ 0.10(0.004) 0.25(0.010 NOTES: 1. Symbols are defined in ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...