ISL6540IRZA-T Intersil, ISL6540IRZA-T Datasheet

IC CTRLR PWM BUCK 1PHASE 28-QFN

ISL6540IRZA-T

Manufacturer Part Number
ISL6540IRZA-T
Description
IC CTRLR PWM BUCK 1PHASE 28-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6540IRZA-T

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
2MHz
Duty Cycle
100%
Voltage - Supply
2.97 V ~ 22 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Frequency-max
2MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Single-Phase Buck PWM Controller with
Integrated High Speed MOSFET Driver
and Pre-Biased Load Capability
The ISL6540 is a single-phase voltage-mode PWM controller
with input voltage feedforward compensation to maintain a
constant loop gain for optimal transient response, especially for
applications with a wide input voltage range. Its integrated high
speed synchronous rectified MOSFET drivers and other
sophisticated features provide complete control and protection
for a DC/DC converter with minimum external components,
resulting in minimum cost and less engineering design efforts.
The output voltage of the converter can be precisely regulated
with an internal reference voltage of 0.591V, and has a system
tolerance of ±0.85% over commercial temperature and line load
variations. An external voltage can be used in place of the
internal reference for voltage tracking/DDR applications.
The ISL6540 has an internal linear regulator or external linear
regulator drive options for applications with only a single supply
rail. The internal oscillator is adjustable from 250kHz to 2MHz.
The integrated voltage margining, programmable pre-biased
soft-start, differential remote sensing amplifier, and
programmable input voltage POR features enhance the
ISL6540 value.
Pinout
REFOUT
VSEN+
VSEN-
REFIN
OFS+
OFS-
SS
1
2
3
4
5
6
7
28
8
27
9
(28 LD 5x5 QFN)
10
26
TOP VIEW
ISL6540
SIDE PAD
BOTTOM
®
GND
11
25
1
12
24
Data Sheet
13
23
14
22
21
20
19
18
17
16
15
BOOT
UGATE
PHASE
PGND
LGATE
PVCC
LINDRV
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• VIN and Power Rail Operation from +3.3V to +20V
• Fast Transient Response - 0 to 100% Duty Cycle
• 2.9V to 5.6V High Speed 2A/4A MOSFET Gate Drivers
• Internal Linear Regulator (LR) - 5.6V Bias from VIN
• External LR Drive for Optimal Thermal Performance
• Voltage Margining with Independently Adjustable Upper and
• Reference Voltage I/O for DDR/Tracking Applications
• Precise 0.591V Internal Reference with Buffered Output
• Source and Sink Overcurrent Protections
• Overvoltage and Undervoltage Protections
• Small Converter Size - QFN package
• Oscillator Programmable from 250kHz to 2MHz
• Differential Remote Voltage Sensing with Unity Gain
• Programmable Soft-start with Pre-Biased Load Capability
• Power Good Indication with Programmable Delay
• EN Input with Voltage Monitoring Capability
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Power Supply for some Microprocessors and GPUs
• Wide and Narrow Input Voltage Range Buck Regulators
• Point of Load Applications
• Low-Voltage and High Current Distributed Power Supplies
Ordering Information
*Add “-T” suffix for tape and reel.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
ISL6540CRZ
ISL6540CRZA ISL6540CRZ
ISL6540IRZA
- 15MHz Bandwidth Error Amplifier with 6V/
- Voltage-Mode PWM Leading and Trailing-edge
- Input Voltage Feedforward Compensation
- Tri-state for Power Stage Shutdown
Lower Settings for System Stress Testing & Over Clocking
- ±0.85%/±1.25% Over Commercial/Industrial Range
- Low- and High-Side MOSFET r
NUMBER*
(Note)
Modulation Control
PART
July 23, 2008
All other trademarks mentioned are the property of their respective owners.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
ISL6540CRZ
ISL6540IRZ
Copyright Intersil Americas Inc. 2006, 2008. All Rights Reserved
MARKING
PART
RANGE (°C)
-40 to 85
0 to 70
0 to 70
TEMP.
DS(ON)
28 Ld QFN L28.5x5
28 Ld QFN L28.5x5
28 Ld QFN L28.5x5
PACKAGE
(Pb-Free)
ISL6540
Sensing
μ
FN9214.1
s Slew Rate
DWG. #
PKG.

Related parts for ISL6540IRZA-T

ISL6540IRZA-T Summary of contents

Page 1

... ISL6540CRZ PVCC 16 ISL6540CRZA ISL6540CRZ LINDRV 15 ISL6540IRZA 14 *Add “-T” suffix for tape and reel. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...

Page 2

Block Diagram 2 ISL6540 FN9214.1 July 23, 2008 ...

Page 3

Typical Application I (Internal Linear Regulator with Remote Sense) +3.3V to +20V C F1 VIN Internal 5.6V Bias Linear Regulator VFF VCC REFIN REFOUT PG C PG_DLY PG_DLY MARCTRL R OFS+ OFS+ R MARG ...

Page 4

Typical Application II (External Linear Regulator without Remote Sense) +3.3V to +20V DRV LINDRV VIN C F3 VFF REFOUT VCC REFIN PG_DLY PG_DLY MARCTRL R OFS+ OFS+ R MARG ...

Page 5

Typical Application III (Dual Data Rate I or II) VDDQ 1.8V or 2.5V 5V VIN R EN1 VFF EN2 F4 1K REFIN REFOUT 15nF DIMM PG_DLY PG_DLY MARCTRL R OFS+ OFS+ ...

Page 6

Absolute Maximum Ratings Input Voltage, VIN, VFF . . . . . . . . . . . . . . . . . . . . . . -0.3V to +22.0V Driver Bias Voltage, PVCC . . . . ...

Page 7

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted (Continued) SYMBOL PARAMETER OSCILLATOR OSC Nominal Frequency Range RANGE ΔOSC Total Variation COM ΔOSC IND ΔV Ramp Amplitude OSC V Ramp Bottom OSC_MIN VFF Minimum Usable VFF Voltage PWM D Maximum Duty ...

Page 8

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted (Continued) SYMBOL PARAMETER GATE DRIVERS R Ugate Source Resistance UGATE I Ugate Source Saturation Current UGATE R Ugate Sink Resistance UGATE I Ugate Sink Saturation Current UGATE R Lgate Source Resistance LGATE ...

Page 9

Functional Pin Description VSEN+ (Pin 1) This pin provides differential remote sense for the ISL6540 the positive input of a standard instrumentation amplifier topology with unity gain, and should connect to the positive rail of the load/processor. The ...

Page 10

LIN_DRV (Pin 15, External Linear Regulator Drive) This pin allows the use of an external pass element to power the IC for input voltages above 5.0V. It should be connected to GND when using an external 5V supply or the ...

Page 11

Functional Description Initialization The ISL6540 automatically initializes upon receipt of power without requiring any special sequencing of the input supplies. The Power-On Reset (POR) function continually monitors the input supply voltages (PVCC,VFF, VCC) and the voltage at the EN pin. ...

Page 12

UV and OV functionality is not enabled until the end of soft-start event is detected asynchronously and causes the high side MOSFET to turn off, the low ...

Page 13

... High Speed MOSFET Gate Driver The integrated driver has similar drive capability and features to Intersil's ISL6605 stand alone gate driver. The PWM tri-state feature helps prevent a negative transient on the output voltage when the output is being shut down. This ...

Page 14

OFS increased. In both modes the voltage difference between OFS+ and OFS- is then sensed with an instrumentation amplifier and is converted to the desired margining voltage by a 5:1 ratio. The maximum designed margining range ...

Page 15

VOUT (LOCAL) GND (LOCAL) VCC 800mV FIGURE 6. SIMPLIFIED UNITY GAIN DIFFERENITAL SENSING IMPLEMENTATION Application Guidelines Layout Considerations As in any high frequency switching converter, layout is very important. Switching current from one power device to another can generate voltage ...

Page 16

Figure 8 shows the circuit traces that require additional layout consideration. Use single point and ground plane construction for the circuits shown. Minimize any leakage current paths on the SS pin and locate the capacitor, C close to the SS ...

Page 17

OSC 1 0 -------------------------------------------- - R = ⋅ ⋅ MAX small capacitor, in Figure 10, can be added to filter C SEN out noise, typically is chosen so ...

Page 18

A stable control loop has a gain crossing with close to a -20dB/decade slope and a phase margin greater than 45°. Include worst case component variations when determining phase margin. The mathematical model presented makes a number of approximations and ...

Page 19

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

Page 20

Package Outline Drawing L28.5x5 28 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 10/07 5.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 4. 65 TYP ) ( 3. 10) TYPICAL RECOMMENDED LAND PATTERN 20 ISL6540 A B ...

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