EL7583IR Intersil, EL7583IR Datasheet
EL7583IR
Specifications of EL7583IR
Available stocks
Related parts for EL7583IR
EL7583IR Summary of contents
Page 1
... Ld TSSOP EL7583IR-T13 7583IR 13” TSSOP EL7583IREZ 7583IREZ - 20 Ld HTSSOP (See Note) (Pb-free) EL7583IREZ-T7 7583IREZ 7” HTSSOP (See Note) (Pb-free) EL7583IREZ-T13 7583IREZ 13” HTSSOP (See Note) (Pb-free) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
Page 2
Absolute Maximum Ratings ( Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 3
Electrical Specifications V = 3.3V PARAMETER DESCRIPTION NEGATIVE REGULATED CHARGE PUMP (V Most negative V output depends on the magnitude of the V OFF configuration (doubler or tripler) V Supply Input for Negative Charge Pump DDN IQ1(V ) ...
Page 4
Pin Descriptions I = Input Output Supply PIN NUMBER PIN NAME PIN TYPE 1 VSSB FBB 4 VDDB DRVN 9 VDDN 10 FBN 11 VSSP 12 ...
Page 5
Typical Performance Curves 12V 80 15V =3. FREQ=1MHz 50 0 100 200 300 400 500 I (mA) OUT FIGURE 1. EFFICIENCY 12V 15V ...
Page 6
Typical Performance Curves f=675kHz, V =5.0V IN 1.5 1.0 0.5 0.0 -0.5 -1.0 18V 15V -1.5 0 100 200 300 400 I (mA) OUT FIGURE 7. LOAD REGULATION vs I f=1MHz, V =5.0V IN 1.5 1.0 0.5 0.0 -0.5 -1.0 ...
Page 7
Typical Performance Curves f(MHz)=1/(0.0118 R +0.378) OSC 1400 1200 1000 800 600 400 200 100 150 200 250 R (kΩ) OSC FIGURE 13 100K & 0.1µF DELAY NETWORK ON ENP, C 5V/DIV 10V/DIV ...
Page 8
Typical Performance Curves JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD HTSSOP EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-5 3.5 2.857W 3 2.5 2 1.5 1 1.111W 0 AMBIENT TEMPERATURE (°C) FIGURE 19. PACKAGE ...
Page 9
Applications Information The EL7583 is high efficiency multiple output power solution designed specifically for thin-film transistor (TFT) liquid crystal display (LCD) applications. The device contains one high current boost converter and two low power charge pumps (V and V ). ...
Page 10
The following table gives typical values: (Margins are considered 10%, 3%, 20%, 10%, and 15 and I , respectively LMT TABLE 1. MAXIMUM CONTINUOUS OUTPUT CURRENT V (V) V ...
Page 11
Single Stage Charge Pump V DDN 5V TO 17V 0.1µF R ONP DRVN C CPN V R OFF ONN C OUT2 V SSN 3.3µ FBN REF Positive Charge Pump Design Considerations A single stage charge ...
Page 12
Two-Stage Positive Charge Pump Circuit V DDP R ONP DRNP R ONN V SSP - + 1.265V The maximum V output voltage for N+1 stage charge pump is ≤ × × × max 2 V ...
Page 13
Two-Stage Negative Charge Pump Circuit V DDN R DRVN The maximum V output voltage for N+1 stage charge pump is: OFF ( ) ≥ × × max OFF OUT ...
Page 14
Typical Application Circuit R 2 110K OPEN 1 13K V BOOST (12V@ 10µF 500mA) OPEN 22µ 10µF 4.7µF GND V OFF (-6V@ 15mA) ...
Page 15
TSSOP Package Outline Drawing 15 EL7583 FN7335.5 May 12, 2006 ...
Page 16
... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...