ISL6336ACRZ Intersil, ISL6336ACRZ Datasheet - Page 11

IC CTRLR PWM 6PHASE BUCK 48-QFN

ISL6336ACRZ

Manufacturer Part Number
ISL6336ACRZ
Description
IC CTRLR PWM 6PHASE BUCK 48-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6336ACRZ

Applications
Controller, Intel VR11.1
Voltage - Input
3 ~ 12 V
Number Of Outputs
1
Voltage - Output
0.5 ~ 1.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL6336ACRZ
Manufacturer:
INTERSIL
Quantity:
280
OFS - The OFS pin provides a means to program a DC
offset current for generating a DC offset voltage at the REF
input. The offset current is generated via an external resistor
and precision internal voltage references. The polarity of the
offset is selected by connecting the resistor to GND or VCC.
For no offset, the OFS pin should be left unterminated.
TCOMP - Temperature compensation scaling input. The
voltage sensed on the TM pin is utilized as the temperature
input to adjust I
effectively compensate for the temperature coefficient of the
current sense element. To implement the integrated
temperature compensation, a resistor divider circuit is needed
with one resistor being connected from TCOMP to VCC of the
controller and another resistor being connected from TCOMP
to GND. Changing the ratio of the resistor values will set the
gain of the integrated thermal compensation. When integrated
temperature compensation function is not used, connect
TCOMP to GND.
OVP - The overvoltage protection output indication pin. This
pin can be pulled to VCC and is latched when an overvoltage
condition is detected. When the OVP indication is not used,
keep this pin open.
IMON - IMON is a current output of the average of the sum
of each phase’s sensed current. A resistor connected from
IMON to GND will produce a voltage that is proportional to
the regulator current. The voltage at this pin is internally
clamped to 1.12V. If the voltage reaches 1.12V the clamp is
activated an overcurrent shutdown will be initiated.
Place a resistor from this pin to GND. A capacitor in parallel
with this resistor is required. The capacitor should be sized
for a minimum time constant of 300µs.
TM - TM is an input pin for VR temperature measurement.
Connect this pin through NTC thermistor to GND and a resistor
to VCC of the controller. The voltage at this pin is reverse
proportional to the VR temperature. ISL6336, ISL6336A
monitors the VR temperature based on the voltage at the TM
pin and the output signals at VR_HOT and VR_FAN.
VR_HOT - VR_HOT is used as an indication of high VR
temperature. It is an open-drain logic output. It will be open
when the measured VR temperature reaches a certain level.
VR_FAN - VR_FAN is an output pin with open-drain logic
output. It will be open when the measured VR temperature
reaches a certain level.
PSI# - The PSI# pin is used to change the state of the
controller. When PSI# is asserted the controller will change
the operating state to improve light load efficiency. The
controller drops the number of active phases to 1-phase or
2-phase operation with diode emulation according to the logic
shown in Table 1. The FS and SS pins are used to optimize
light load efficiency for non-coupled inductor, 2-phase coupled
inductor, and (n-x)-phase coupled inductor applications. The
DROOP
and the overcurrent protection limit to
11
ISL6336, ISL6336A
controller resumes normal operation when this pin is pulled
HIGH. This pin has a 40µA internal pull-up to about 1V.
APA - The APA pin is used to adjust the Adaptive Phase
Alignment trip level. A 50µA current source flows into this pin.
A resistor connected from this pin to COMP sets the voltage
trip level. A small decoupling capacitor should be placed in
parallel with the resistor for high frequency decoupling.
Operation
Multiphase Power Conversion
Microprocessor load current profiles have changed to the
point that the advantages of multiphase power conversion
are impossible to ignore. The technical challenges
associated with producing a single-phase converter which is
both cost-effective and thermally viable, have forced a
change to the cost-saving approach of multiphase. The
ISL6336, ISL6336A controller helps reduce the complexity of
implementation by integrating vital functions and requiring
minimal output components. The block diagrams on page 5
and 6 provide top level views of multiphase power
conversion using the ISL6336, ISL6336A controller.
Interleaving
The switching of each channel in a multiphase converter is
timed to be symmetrically out of phase with each of the other
channels. In a 3-phase converter for example, each channel
switches 1/3 cycle after the previous channel and 1/3 cycle
before the following channel. As a result, the three-phase
converter has a combined ripple frequency 3x greater than
the ripple frequency of any one phase. In addition, the
peak-to-peak amplitude of the combined inductor current is
reduced in proportion to the number of phases (see
Equations 1 and 2). The increased ripple frequency and the
lower ripple amplitude mean that the designer can use less
per-channel inductance and lower total output capacitance
for any performance specification.
Figure 1 illustrates the multiplicative effect on output ripple
frequency. The three channel currents (IL1, IL2, and IL3)
combine to form the AC ripple current and the DC load
current. The ripple component has 3x the ripple frequency of
each individual channel current. Each PWM pulse is
triggered 1/3 of a cycle after the start of the PWM pulse of the
previous phase. The DC components of the inductor currents
combine to feed the load.
To understand the reduction of the ripple current amplitude in
the multiphase circuit, examine Equation 1, which represents
an individual channel’s peak-to-peak inductor current.
In Equation 1, V
voltages respectively, L is the single-channel inductor value,
and f
I
PP
=
S
(
--------------------------------------------------------- -
V
is the switching frequency.
IN
L f
V
OUT
S
IN
V
) V
and V
IN
OUT
OUT
are the input and the output
May 28, 2009
FN6504.1
(EQ. 1)

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