HCPL-0710 Avago Technologies US Inc., HCPL-0710 Datasheet - Page 8

• Manufacturer Part Number: HCPL-0710
• Description: OPTOCOUPLER CMOS 12MBD 8-SOIC
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-0710

• Voltage - Isolation: 3750Vrms
• Number Of Channels: 1, Unidirectional
• Current - Output / Channel: 10mA
• Data Rate: 12.5MBd
• Propagation Delay High - Low @ If: 20ns
• Input Type: Logic
• Output Type: Push-Pull, Totem-Pole
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• No. Of Channels: 1
• Isolation Voltage: 3.75kV
• Optocoupler Output Type: Gate Drive
• Input Current: 10µA
• Output Voltage: 5V
• Opto Case Style: SOIC
• No. Of Pins: 8
• Propagation Delay Low-high: 40ns
• Common Mode Voltage Vcm: 1000V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 516-1116-5

8
Package Characteristics
Notes:
10. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
11. C
Figure 1. Typical output voltage vs. input voltage.
8. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together.
9. In accordance with UL1577, each HCPL-0710 is proof tested by applying an insulation test voltage ≥4500 V
Parameter
Input-Output Momentary
Withstand Voltage
Resistance
(Input-Output)
Capacitance
(Input-Output)
Input Capacitance
Input IC Junction-to-Case
Thermal Resistance
Output IC Junction-to-Case
Thermal Resistance
Package Power Dissipation
1. The LED is ON when V
2. t
3. Mimimum Pulse Width is the shortest pulse width at which 10% maximum, Pulse Width Distortion can be guaranteed. Maximum Data Rate is
4. PWD is defined as |t
5. t
6. CM
7. Unloaded dynamic power dissipation is calculated as follows: C
t
the inverse of Minimum Pulse Width. Operating the HCPL-x710 at data rates above 12.5 MBd is possible provided PWD and data dependent
jitter increases and relaxed noise margins are tolerable within the application. For instance, if the maximum allowable variation of bit width is
30%, the maximum data rate becomes 37.5 MBd. Please note that HCPL-x710 performances above 12.5 MBd are not guaranteed by Hewlett-
Packard.
the recommended operating conditions.
mode voltage slew rate that can be sustained while maintaining V
falling common mode voltage edges.
tion current limit, I
tion current limit, I
voltage rating. For the continuous voltage rating refer to your equipment level safety specification or Avago Application Note 1074 entitled
“Optocoupler Input-Output Endurance Voltage. ”
PHL
PLH
PSK
5
4
3
2
1
0
I
is the capacitance measured at pin 2 (V
0
H
is equal to the magnitude of the worst case difference in t
propagation delay is measured from the 50% level on the falling edge of the V
propagation delay is measured from the 50% level on the rising edge of the V
is the maximum common mode voltage slew rate that can be sustained while maintaining V
1
HCPL-0710 fig 1
[8]
[8]
2
V
I-O
I-O
I
PHL
[11]
(V)
[8, 9, 10]
≤5 µA). Each HCPL-7710 is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 second (leakage detec-
≤ 5 µA).
I
is low and OFF when V
- t
3
PLH
|. %PWD (percent pulse width distortion) is equal to the PWD divided by pulse width.
0 °C
25 °C
85 °C
4
0710
7710
Option 020
-7710
-0710
-7710
-0710
5
I
).
I
Figure 2. Typical input voltage switching threshold vs.
input supply voltage.
is high.
2.2
2.1
2.0
1.9
1.8
1.7
1.6
4.5
Symbol Min.
V
R
C
C
q
q
P
I-O
jci
jco
PD
ISO
I-O
I
4.75
PHL
0 °C
25 °C
85 °C
PD
HCPL-0710 fig 2
and/or t
O
* V
V
< 0.8 V. The common mode voltage slew rates apply to both rising and
DD2
DD1
3750
3750
5000
5
* f + I
(V)
PLH
that will be seen between units at any given temperature within
DD
5.25
Typ.
10
0.6
3.0
145
160
140
135
* V
I
I
signal to the 50% level of the rising edge of the V
DD
12
signal to the 50% level of the falling edge of the V
, where f is switching frequency in MHz.
5.5
Max.
150
Figure 3. Typical propagation delays vs. temperature.
O
> 0.8 V
29
27
25
23
21
19
17
15
Units
Vrms
W
pF
°C/W
mW
0
DD2
RMS
10
. CM
for 1 second (leakage detec-
20 30
Test Conditions
RH = 50%,
T
V
f = 1 MHz
Thermocouple
located at center
underside of package
t = 1 min.,
L
A
I-O
T
T
HCPL-0710 fig 3
is the maximum common
PLH
PHL
= 25°C
= 500 Vdc
T
40
A
(C)
50
60
O
70
O
signal.
signal.
80