HIP4080A/81AEVALZ Intersil, HIP4080A/81AEVALZ Datasheet - Page 2

• Manufacturer Part Number: HIP4080A/81AEVALZ
• Description: DEMO BOARD FOR HIP4081A
• Manufacturer: Intersil

Specifications of HIP4080A/81AEVALZ

• Main Purpose: Power Management, H Bridge Driver (Internal FET)
• Utilized Ic / Part: HIP4080A, HIP4081A
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Other names: HIP4080A/81AEVAL; HIP4080A/81AEVAL; Q2670719

When no current is flowing in either direction in the load, the
output of A1 is exactly 6V. The reference input, IN, would
also have to be 6V to request zero current from the bridge.
The bridge would still switch in this case, because of the
positive feedback connection of the HIP4080A internal
comparator. The frequency of oscillation of the output will be
a function of the amount of dc hysteresis gain, R
size of capacitor, C
the steady-state frequency of the bridge will become smaller.
It is beyond the scope of this application note to provide a full
analysis. A valuable characteristic of hysteresis control is
that as the error becomes smaller (i.e. the reference and
feedback signals match) the frequency increases. Usually
this occurs when the load current is small or at a minimum.
When the error signal is large, the frequency becomes very
small, perhaps even DC. One advantage of this is that when
currents are largest, switching losses are a minimum, and
when switching losses are largest, the dc current component
is small.
The HIP408x family of devices is fabricated using a
proprietary Intersil IC process which allows this family to
switch at frequencies of over 500kHz. Therefore the
HIP408x family is ideal for use in Voice coil motor, switching
power amplifier, DC/DC converters and high performance
AC/DC and step-motor control applications.
To provide accurate dead-time control for the twin purposes
of shoot-through avoidance and duty-cycle maximization,
two resistors tied to pins HDEL and LDEL provide precise
delay matching of upper and lower propagation delays,
which are typically only 55ns. The HIP408x family of
H-bridge drivers has enough voltage margin to be applied to
all SELV (UL classification for operation at ≤ 42.0V)
applications and most Automotive applications where “load
dump” capability over 65V is required. This capability makes
the HIP408x family a more cost-effective solution for driving
N-Channel power MOSFETs than either discrete solutions or
other solutions relying on transformer- or opto-coupling gate-
drive techniques as shown in Figure 1.
The HIP4080A differs from the HIP4081A regarding the
function of pins 2, 5, 6 and 7 of the IC and the truth table
which governs the switching function of the two ICs. In the
HIP4080A, pins 2, 5, 6 and 7 are labeled HEN, OUT, IN+
and IN-, respectively. In the HIP4081A, pins 2, 5, 6 and 7 are
labeled BHI (B-side high input), BLI (B-side low input), ALI
(A-side low input) and AHI (A-side high input), respectively.
The HIP4081A’s inputs individually control each of the four
power MOSFETs, or in pairs (excepting the shoot-through
case). The HIP4080A provides an internal comparator and a
“high enable...HEN” pin. The comparator can be used to
provide a PWM logic signal to switch the appropriate
MOSFETs within the H-bridge, and can facilitate “Hysteresis”
control to be illustrated later. The HEN pin enables (when
HEN is high) or disables (when HEN is low) the A-side and
B-side upper MOSFETs. With HEN held low, it is possible to
1
. As the capacitor, C
2
1
, is made larger,
3
/R
Application Note 9404
1
and the
switch only the lower H-bridge MOSFETs. When HEN is high
both upper and lower MOSFETs of the
H-bridge are switched. The HEN input can also be H-switched
with the IN+ and IN- inputs used only for direction control,
thereby minimizing switching losses.
Description of the HIP4080A
The block diagram of the HIP4080A relating to driving the
A-side of the H-Bridge is shown in Figure 4. The blocks
associated with each side of the H-Bridge are identical, so
the B-side is not shown for simplicity.
The two bias voltage terminals, V
HIP4080A should be tied together. They were separated
within the HIP4080A to avoid possible ground loops internal
to the IC. Tieing them together and providing a decoupling
capacitor from the common tie-point to V
noise immunity.
Input Logic
The HIP4080A accepts inputs which control the output state
of the power MOSFET H-bridge and provides a comparator
output pin, OUT, which can provide compensation or
hysteresis.
The DIS, “Disable,” pin disables gate drive to all H-bridge
MOSFETs regardless of the command states of the input
pins, IN+, IN
also can disable all gate drive as discussed in the
introduction. The HEN, “High Enable,” pin enables and
disables gate drive to the two high side MOSFETs. A high
level on the HEN pin “enables” high side gate drive as
further determined by the states of the IN+ and IN
comparator input pins, since the IN+ and IN
which diagonal pair of MOSFETs are gated. Upper drive can
be “modulated” through use of the HEN pin while drive to
diagonally opposing lower MOSFETs is continuous. To
simultaneously modulate both upper and lower drivers, HEN
is continuously held high while modulating the IN+ and IN
pins.
Modulating only the upper switches can nearly halve the
switching losses in both the driver IC and in the lower
MOSFETs. The power dissipation saved at high switching
frequencies can be significant. Table 1 summarizes the input
control logic.
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and HEN. The state of the bias voltage, V
CC
and V
SS
DD
greatly improves
_
pins control
, on the
December 11, 2007
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AN9404.3
DD
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,