ISL6559EVAL2 Intersil, ISL6559EVAL2 Datasheet - Page 16

• Manufacturer Part Number: ISL6559EVAL2
• Description: EVALUATION BOARD 2 ISL6559
• Manufacturer: Intersil

Specifications of ISL6559EVAL2

• Main Purpose: Special Purpose DC/DC, VRM Supply
• Outputs And Type: 1, Non-Isolated
• Power - Output: 67.6W
• Voltage - Output: 1.3V
• Current - Output: 52A
• Voltage - Input: 5V, 12V
• Regulator Topology: Buck
• Frequency - Switching: 250kHz
• Board Type: Fully Populated
• Utilized Ic / Part: HIP6601, ISL6559
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

each of the three cases which follow, there is a separate set
of equations for the compensation components.
Case 3:
In Equations 23, L is the per-channel filter inductance
divided by the number of active channels; C is the sum total
of all output capacitors; ESR is the equivalent-series
resistance of the bulk output-filter capacitance; and V
the peak-to-peak sawtooth signal amplitude as described in
Figure 4 and Electrical Specifications.
Once selected, the compensation values in Equations 23
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
improved by making adjustments to R
value of R
oscilloscope until no further improvement is noted. Normally,
C
Equations 23 unless some performance issue is noted.
The optional capacitor C
noise away from the PWM comparator (see Figure 12). Keep
a position available for C
frequency capacitor of between 22pF and 150pF in case any
trailing edge jitter problem is noted.
Case 2:
Case 1:
C
will not need adjustment. Keep the value of C
C
while observing the transient performance on an
-------------------
2π LC
R
C
f
R
C
C
C
0
-------------------
2π LC
R
C
C
C
1
>
C
C
=
=
----------------------------- -
2πC ESR
=
=
1
=
=
R
------------------------------------------------------------ -
(
2π
R
0.75V
------------------------------------------------ -
≤
FB
2πV
2
2
R
----------------------------------- -
2πV
FB
f
(
, is sometimes needed to bypass
, and be prepared to install a high-
)
1
>
0
FB
V
--------------------------------------------
2
0.75V
<
f
----------------------------------------- -
0.75 V
PP
f
0
PP
16
PP
2πf
----------------------------------- -
0
IN
0.75V
----------------------------- -
2πC ESR
2
0.75 V
2π f
(
V
)
R
(
0.75V
R
2π
ESR
0
PP
FB
IN
FB
V
(
1
0
IN
)
pp
IN
2
R
V
f
f
0
0
IN
(
f
pp
) C
FB
IN
0
ESR
C
2
LC
L
L
)
. Slowly increase the
LC
LC
)
C
from
(EQ. 23)
PP
is
ISL6559
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A
type III controller, as shown in Figure 13, provides the
necessary compensation.
The first step is to choose the desired bandwidth, f
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than 1/3
of the switching frequency. The type-III compensator has an
extra high-frequency pole, f
noise rejection or to assure adequate attenuation at the error-
amplifier high-order pole and zero frequencies. A good general
rule is to chose f
Choosing f
too much phase shift below the system bandwidth.
In the solutions to the compensation equations, there is a single
degree of freedom. For the solutions presented in Equations
24, R
components are then selected according to Equations 24.
R
C
C
R
C
1
1
2
C
C
FIGURE 13. COMPENSATION CIRCUIT FOR ISL6559 BASED
=
=
=
=
=
FB
R
C
---------------------------------------- -
------------------------------------------------------------------ -
(
R
-------------------------------------------------------------------- -
0.75 V
------------------------------------------------------------------ -
(
2π
0.75V
2π
V
1
LC C ESR
1
FB
is selected arbitrarily. The remaining compensation
PP
)
)
2
---------------------------------------- -
2
HF
–
R
f


f
LC C ESR
0
IN
2π
0
FB
IN
f
C ESR
f
0.75V
HF
CONVERTER WITHOUT LOAD-LINE
REGULATION.
to be lower than 10f
(
HF




–
(


2πf
2πf
2
HF
f
0
LCR
(
LCR
HF
f
HF
R
IN
= 10f
)
HF
FB
)
R
C
LCR
FB
LC 1
FB
LC 1
)
C
0
V
V
–
, but it can be higher if desired.
2
–
PP
HF
FB
C
PP


C


. This pole can be used for added
0
COMP
VDIFF
can cause problems with
IOUT
FB
December 29, 2004
0
, of the
(EQ. 24)
FN9084.8