CYII4SM6600-EVAL Cypress Semiconductor Corp, CYII4SM6600-EVAL Datasheet - Page 12

• Manufacturer Part Number: CYII4SM6600-EVAL
• Description: BOARD EVAL IMAGE SENS IBIS4-6600
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYII4SM6600-EVAL

• Sensor Type: CMOS Imaging, Monochrome
• Sensing Range: 6.6 Megapixel
• Interface: SPI
• Sensitivity: 89 fps
• Voltage - Supply: 2.5 V ~ 3.3 V
• Embedded: No
• Utilized Ic / Part: IBIS4-6600
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

Sub Sample Modes
To increase the frame rate for lower resolution and regions of
interest, several sub sampling modes are implemented. The
possible sub sample modes are listed in
programmed in the IMAGE_CORE register (refer
page 17). To preserve the color information, two adjacent pixels
are read in any mode. The number of pixels that is not read
varies from mode to mode. This is designed as a repeated block
24 pixels wide, which is the lowest common multiple of the
modes described. Including the dummy pixels and the two
additional rows/columns, the number of starting coordinates for
the x and y shift register is 99 in the X direction and 138 in the Y
direction. The total number of pixels, excluding dummy pixels, is
a multiple of 24, and two additional pixels to have the same
window edges independently of the sub sampling mode.
Document Number: 001-02366 Rev. *G
C
D
A
B
E
scan direction
Table
7. The bits can be
Figure 13. X-Sub Sampling
Table 10
24 column amplifiers
on
In the X direction, two columns are always addressed at the
same moment, because the signals from the odd and even
columns must be put simultaneously on the corresponding bus.
In the Y direction, the rows are addressed one by one. This
results in slightly different implementations of the sub-sampling
modes for the two directions (Refer
page 13).
Table 7. Subsample Patterns
Mode
A
B
C
D
E
Bits
000
001
010
011
1xx
IBIS4-6600 CYII4SM6600AB
Read
2
2
2
2
2
Figure 13
Step
12
2
4
6
8
bus1_S
bus1_R
bus2_S
bus2_R
Default mode
(Skip 2)
(Skip 4)
(Skip 6)
(Skip 10)
and
Description
Page 12 of 34
Figure 14
on
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