ATTINY85-20SU Atmel, ATTINY85-20SU Datasheet - Page 127

• Manufacturer Part Number: ATTINY85-20SU
• Description: IC AVR MCU 8K 20MHZ 8SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY85-20SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Processor Series: ATTINY8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: USI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIPATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.3
2586M–AVR–07/10
Operation
Figure 17-1. Analog to Digital Converter Block Schematic
The ADC converts an analog input voltage to a 10-bit digital value through successive approxi-
mation. The minimum value represents GND and the maximum value represents the voltage on
V
The voltage reference for the ADC may be selected by writing to the REFS[2:0] bits in ADMUX.
The VCC supply, the AREF pin or an internal 1.1V / 2.56V voltage reference may be selected as
the ADC voltage reference. Optionally the internal 2.56V voltage reference may be decoupled
by an external capacitor at the AREF pin to improve noise immunity.
The analog input channel and differential gain are selected by writing to the MUX[3:0] bits in
ADMUX. Any of the four ADC input pins ADC[3:0] can be selected as single ended inputs to the
ADC. ADC2 or ADC0 can be selected as positive input and ADC0, ADC1, ADC2 or ADC3 can
be selected as negative input to the differential gain amplifier.
If differential channels are selected, the differential gain stage amplifies the voltage difference
between the selected input pair by the selected gain factor, 1x or 20x, according to the setting of
the MUX[3:0] bits in ADMUX. This amplified value then becomes the analog input to the ADC. If
single ended channels are used, the gain amplifier is bypassed altogether.
CC
ADC3
ADC2
ADC1
ADC0
AREF
V
CC
, the voltage on the AREF pin or an internal 1.1V / 2.56V voltage reference.
INTERNAL 1.1V/2.56V
TEMPERATURE
8-BIT DATA BUS
ADC CTRL. & STATUS B
REGISTER (ADCSRB)
SENSOR
REFERENCE
ADC4
INPUT
INPUT
MUX
NEG.
MUX
ADC MULTIPLEXER
SELECT (ADMUX)
MUX DECODER
+
-
GAIN
AMPLIFIER
SINGLE ENDED / DIFFERENTIAL SELECTION
10-BIT DAC
ADC CTRL. & STATUS A
REGISTER (ADCSRA)
ADC CONVERSION
COMPLETE IRQ
PRESCALER
CONVERSION LOGIC
ADTS[2:0]
INTERRUPT
TRIGGER
FLAGS
SELECT
SAMPLE & HOLD
COMPARATOR
15
+
-
ADC DATA REGISTER
(ADCH/ADCL)
ADC MULTIPLEXER
OUTPUT
0
127