DSPIC33FJ12MC201-I/SO Microchip Technology, DSPIC33FJ12MC201-I/SO Datasheet - Page 205

IC DSPIC MCU/DSP 12K 20SOIC

DSPIC33FJ12MC201-I/SO

Manufacturer Part Number
DSPIC33FJ12MC201-I/SO
Description
IC DSPIC MCU/DSP 12K 20SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC201-I/SO

Program Memory Type
FLASH
Program Memory Size
12KB (12K x 8)
Package / Case
20-SOIC (7.5mm Width)
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
15
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
15
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 21-2:
© 2009 Microchip Technology Inc.
FNOSC<2:0>
FCKSM<1:0>
OSCIOFNC
BSS<2:0>
GSS<1:0>
IOL1WAY
Bit Field
GWRP
BWRP
IESO
dsPIC33F CONFIGURATION BITS DESCRIPTION
FOSCSEL
FOSCSEL
Register
FOSC
FOSC
FOSC
FGS
FGS
FBS
FBS
Boot Segment Program Flash Write Protection
1 = Boot segment can be written
0 = Boot segment is write-protected
Boot Segment Program Flash Code Protection Size
X11 = No Boot program Flash segment
Boot space is 256 Instruction Words (except interrupt vectors)
110 = Standard security; boot program Flash segment ends at
010 = High security; boot program Flash segment ends at 0x0003FE
Boot space is 768 Instruction Words (except interrupt vectors)
101 = Standard security; boot program Flash segment, ends at
001 = High security; boot program Flash segment ends at 0x0007FE
Boot space is 1792 Instruction Words (except interrupt vectors)
100 = Standard security; boot program Flash segment ends at
000 = High security; boot program Flash segment ends at 0x000FFE
General Segment Code-Protect bit
11 = User program memory is not code-protected
10 = Standard security
0x = High security
General Segment Write-Protect bit
1 = User program memory is not write-protected
0 = User program memory is write-protected
Two-speed Oscillator Start-up Enable bit
1 = Start-up device with FRC, then automatically switch to the
0 = Start-up device with user-selected oscillator source
Initial Oscillator Source Selection bits
111 = Internal Fast RC (FRC) oscillator with postscaler
110 = Internal Fast RC (FRC) oscillator with divide-by-16
101 = LPRC oscillator
100 = Secondary (LP) oscillator
011 = Primary (XT, HS, EC) oscillator with PLL
010 = Primary (XT, HS, EC) oscillator
001 = Internal Fast RC (FRC) oscillator with PLL
000 = FRC oscillator
Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Peripheral pin select configuration
1 = Allow only one reconfiguration
0 = Allow multiple reconfigurations
OSC2 Pin Function bit (except in XT and HS modes)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
Preliminary
user-selected oscillator source when ready
0x0003FE
0x0007FE
0x000FFE
dsPIC33FJ12MC201/202
Description
DS70265D-page 203

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