ATMEGA16A-MU Atmel, ATMEGA16A-MU Datasheet - Page 285
![MCU AVR 16K FLASH 16MHZ 44-QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA16A-MU
Manufacturer Part Number
ATMEGA16A-MU
Description
MCU AVR 16K FLASH 16MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA16A-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
44QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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- Download datasheet (8Mb)
Table 26-14. JTAG Programming Instruction Set
8154B–AVR–07/09
Instruction
1a. Chip erase
1b. Poll for chip erase complete
2a. Enter Flash Write
2b. Load Address High Byte
2c. Load Address Low Byte
2d. Load Data Low Byte
2e. Load Data High Byte
2f. Latch Data
2g. Write Flash Page
2h. Poll for Page Write complete
3a. Enter Flash Read
3b. Load Address High Byte
3c. Load Address Low Byte
3d. Read Data Low and High Byte
4a. Enter EEPROM Write
4b. Load Address High Byte
4c. Load Address Low Byte
4d. Load Data Byte
4e. Latch Data
4f. Write EEPROM Page
4g. Poll for Page Write complete
5a. Enter EEPROM Read
5b. Load Address High Byte
5c. Load Address Low Byte
a = address high bits, b = address low bits, H = 0 – Low byte, 1 – High Byte, o = data out, i = data in, x = don’t care
TDI sequence
0100011_10000000
0110001_10000000
0110011_10000000
0110011_10000000
0100011_00010000
0000111_aaaaaaaa
0000011_bbbbbbbb
0010011_iiiiiiii
0010111_iiiiiiii
0110111_00000000
1110111_00000000
0110111_00000000
0110111_00000000
0110101_00000000
0110111_00000000
0110111_00000000
0100011_00000010
0000111_aaaaaaaa
0000011_bbbbbbbb
0110010_00000000
0110110_00000000
0110111_00000000
0100011_00010001
0000111_aaaaaaaa
0000011_bbbbbbbb
0010011_iiiiiiii
0110111_00000000
1110111_00000000
0110111_00000000
0110011_00000000
0110001_00000000
0110011_00000000
0110011_00000000
0100011_00000011
0000111_aaaaaaaa
0000011_bbbbbbbb
0110011_10000000
0110111_00000000
0110011_00000000
TDO sequence
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
ATmega16A
Notes
(2)
(9)
(1)
(1)
(2)
(9)
Low byte
High byte
(9)
(1)
(1)
(2)
(9)
285
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