ATMEGA16A-MU Atmel, ATMEGA16A-MU Datasheet - Page 44
![MCU AVR 16K FLASH 16MHZ 44-QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA16A-MU
Manufacturer Part Number
ATMEGA16A-MU
Description
MCU AVR 16K FLASH 16MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA16A-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
44QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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- Download datasheet (8Mb)
11. Interrupts
11.1
11.2
44
Overview
Interrupt Vectors
ATmega16A
This section describes the specifics of the interrupt handling as performed in ATmega16A. For a
general explanation of the AVR interrupt handling, refer to
page
Table 11-1.
Notes:
Table 11-2
BOOTRST and IVSEL settings. If the program never enables an interrupt source, the Interrupt
Vectors are not used, and regular program code can be placed at these locations. This is also
Vector No.
14.
10
11
12
13
14
15
16
17
18
19
20
21
1
2
3
4
5
6
7
8
9
1. When the BOOTRST Fuse is programmed, the device will jump to the Boot Loader address at
2. When the IVSEL bit in GICR is set, interrupt vectors will be moved to the start of the Boot
reset, see
Flash section. The address of each Interrupt Vector will then be the address in this table added
to the start address of the Boot Flash section.
shows Reset and Interrupt Vectors placement for the various combinations of
Reset and Interrupt Vectors
Address
Program
$000
$00A
$00C
$00E
$01A
$01C
$01E
$002
$004
$006
$008
$010
$012
$014
$016
$018
$020
$022
$024
$026
$028
“Boot Loader Support – Read-While-Write Self-Programming” on page
(1)
(2)
TIMER1 COMPB
TIMER1 COMPA
TIMER2 COMP
TIMER0 COMP
TIMER1 CAPT
USART, UDRE
TIMER2 OVF
TIMER1 OVF
TIMER0 OVF
USART, RXC
USART, TXC
ANA_COMP
SPM_RDY
SPI, STC
EE_RDY
Source
RESET
INT0
INT1
INT2
ADC
TWI
Interrupt Definition
External Pin, Power-on Reset, Brown-out Reset,
Watchdog Reset, and JTAG AVR Reset
External Interrupt Request 0
External Interrupt Request 1
Timer/Counter2 Compare Match
Timer/Counter2 Overflow
Timer/Counter1 Capture Event
Timer/Counter1 Compare Match A
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter0 Overflow
Serial Transfer Complete
USART, Rx Complete
USART Data Register Empty
USART, Tx Complete
ADC Conversion Complete
EEPROM Ready
Analog Comparator
Two-wire Serial Interface
External Interrupt Request 2
Timer/Counter0 Compare Match
Store Program Memory Ready
“Reset and Interrupt Handling” on
8154B–AVR–07/09
250.
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