PIC18LF6310-I/PT Microchip Technology, PIC18LF6310-I/PT Datasheet - Page 121
PIC18LF6310-I/PT
Manufacturer Part Number
PIC18LF6310-I/PT
Description
IC PIC MCU FLASH 4KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F6310-IPT.pdf
(412 pages)
2.PIC18F6310-IPT.pdf
(16 pages)
3.PIC18F6310-IPT.pdf
(4 pages)
4.PIC18F6310-IPT.pdf
(28 pages)
5.PIC18F6310-IPT.pdf
(6 pages)
6.PIC18F6310-IPT.pdf
(4 pages)
7.PIC18F8410-IPT.pdf
(404 pages)
Specifications of PIC18LF6310-I/PT
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
54
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
No. Of Pwm
RoHS Compliant
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF6310-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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- PIC18F8410-IPT PDF datasheet #7
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REGISTER 10-11: IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
OSCFIP
R/W-1
OSCFIP: Oscillator Fail Interrupt Priority bit
1 = High priority
0 = Low priority
CMIP: Comparator Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
BCLIP: Bus Collision Interrupt Priority bit
1 = High priority
0 = Low priority
HLVDIP: High/Low-Voltage Detect Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3IP: TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
CCP2IP: CCP2 Interrupt Priority bit
1 = High priority
0 = Low priority
R/W-1
CMIP
W = Writable bit
‘1’ = Bit is set
U-0
—
PIC18F6310/6410/8310/8410
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
BCLIP
HLVDIP
R/W-1
x = Bit is unknown
TMR3IP
R/W-1
DS39635C-page 121
CCP2IP
R/W-1
bit 0
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